2017-04-28 02:25:20 +08:00
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#include <arm/armv7-m.dtsi>
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/ {
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cpus {
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cpu@0 {
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compatible = "arm,cortex-m3";
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};
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};
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sram0: memory {
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compatible = "sram";
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reg = <0x20000000 (64*1024)>;
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};
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flash0: flash {
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reg = <0x00000000 (256*1024)>;
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};
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soc {
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2017-04-29 00:34:06 +08:00
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uart0: uart@4000C000 {
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compatible = "ti,stellaris-uart";
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reg = <0x4000C000 0x4c>;
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interrupts = <5 3>;
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status = "disabled";
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};
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uart1: uart@4000D000 {
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compatible = "ti,stellaris-uart";
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reg = <0x4000D000 0x4c>;
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interrupts = <6 3>;
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status = "disabled";
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};
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uart2: uart@4000E000 {
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compatible = "ti,stellaris-uart";
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reg = <0x4000E000 0x4c>;
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interrupts = <33 3>;
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status = "disabled";
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};
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2017-04-28 02:25:20 +08:00
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};
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};
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&nvic {
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arm,num-irq-priority-bits = <3>;
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};
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