zephyr/boards/nxp/mimxrt1180_evk/mimxrt1180_evk_mimxrt1189_c...

#
# Copyright 2024 NXP
#
# SPDX-License-Identifier: Apache-2.0
#

identifier: mimxrt1180_evk/mimxrt1189/cm7
name: NXP MIMXRT1180-EVK CM7
type: mcu
arch: arm
toolchain:
  - zephyr
  - gnuarmemb
  - xtools
ram: 256
flash: 256
supported:
  - gpio
  - uart
  - i2c
  - counter
  - adc
vendor: nxp
boards: nxp: add mimxrt1180_evk board Support rgpio/lpuart peripherals Support linkserver/jlink debug ways Test cases: hello_world; button; blinky; synchronization; philosophers There is one limitation with flashing and debugging the SoC's second core(M7) that will be addressed with furture submission Signed-off-by: Lucien Zhao <lucien.zhao@nxp.com> 2024-06-03 18:29:03 +08:00			`#`
			`# Copyright 2024 NXP`
			`#`
			`# SPDX-License-Identifier: Apache-2.0`
			`#`

			`identifier: mimxrt1180_evk/mimxrt1189/cm7`
			`name: NXP MIMXRT1180-EVK CM7`
			`type: mcu`
			`arch: arm`
			`toolchain:`
			`- zephyr`
			`- gnuarmemb`
			`- xtools`
			`ram: 256`
			`flash: 256`
			`supported:`
			`- gpio`
			`- uart`
boards: nxp: mimxrt1180_evk: add lpi2c2/3 pinmux add lpi2c2/3 pinmux Signed-off-by: Lucien Zhao <lucien.zhao@nxp.com> 2024-07-24 14:27:56 +08:00			`- i2c`
boards: nxp: mimxrt1180_evk: Set GPT2 status as ok Set GPT2 status as ok for cm33 and cm7 core Update feature guide description Signed-off-by: Lucien Zhao <lucien.zhao@nxp.com> 2024-07-22 11:39:28 +08:00			`- counter`
boards: nxp: mimxrt1180_evk: add lpadc1 support add lpadc1 ch0a/ch1a channel in pinctrl set lpadc1 status ok Signed-off-by: Lucien Zhao <lucien.zhao@nxp.com> 2024-08-11 21:44:20 +08:00			`- adc`
boards: nxp: add mimxrt1180_evk board Support rgpio/lpuart peripherals Support linkserver/jlink debug ways Test cases: hello_world; button; blinky; synchronization; philosophers There is one limitation with flashing and debugging the SoC's second core(M7) that will be addressed with furture submission Signed-off-by: Lucien Zhao <lucien.zhao@nxp.com> 2024-06-03 18:29:03 +08:00			`vendor: nxp`