zephyr/dts/bindings/pcie/host/pcie-controller.yaml

# Copyright (c) 2020 Intel Corporation
# SPDX-License-Identifier: Apache-2.0

# Common fields for PCIe bus controllers

include: base.yaml

bus: pcie

properties:
    "#address-cells":
      required: true
    "#size-cells":
      required: true
dts: bindings: Add binding for PCIe bus Add a binding to represent a PCIe bus. This way PCIe devices can be ordered under a parent PCIe bus object and make help of DT BUS macros for conditional code. Signed-off-by: Johan Hedberg <johan.hedberg@intel.com> 2020-12-21 18:05:48 +08:00			`# Copyright (c) 2020 Intel Corporation`
			`# SPDX-License-Identifier: Apache-2.0`

			`# Common fields for PCIe bus controllers`

			`include: base.yaml`

			`bus: pcie`

			`properties:`
			`"#address-cells":`
			`required: true`
			`"#size-cells":`
			`required: true`