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zephyr/drivers/serial/Makefile

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uart: Introduce QMSI shim driver This patch introduces the QMSI UART driver which is simply a shim driver based on UART driver provided by QMSI BSP. This initial version implements only the mandatory APIs 'poll_in', 'poll_out' and 'err_check' which are required by trivial sample apps and by output functionality from the console driver. The remaining APIs will be implemented by up coming patches. The driver supports only 115200 baud rate at the moment. In order to enable this driver, the following options should be set: CONFIG_QMSI_DRIVERS=y CONFIG_QMSI_INSTALL_PATH="/path/to/libqmsi/directory" CONFIG_SERIAL=y CONFIG_UART_QMSI=y This driver has been tested with Quark SE Devboard so this patch also adds its platform-specific default configuration options to 'arch/x86/ soc/quark_se/Kconfig'. Change-Id: Ibde1825d4b0349a376a8e7d91cc9de306946b62f Signed-off-by: Andre Guedes <andre.guedes@intel.com>
2016-02-27 01:51:28 +08:00
ccflags-$(CONFIG_UART_QMSI) +=-I$(CONFIG_QMSI_INSTALL_PATH)/include
serial/stm32: add driver for STM32 UART Add driver for U(S)ART ports on STM32 MCUs. The driver implements basic RX/TX functionality. Data transmission is implemented using polling. The driver configures the port to use 8bit data transmission, 1 stop bit, no parity control. The driver exposes a public uart driver API and registers a single UART device 'UART_0'. The device binds to USART1 peripheral and performs required pinmux and clock control configuration. The device can be initialized at the PRIMARY level, with default device priority. The driver has been verified to work with a sample Hello World application on a STM32F103 series MCU. Change-Id: Iae103fcd8d2fb0a6c173cf141a68e17791255aab Origin: Original Signed-off-by: Maciej Borzecki <maciek.borzecki@gmail.com>
2016-03-03 22:33:20 +08:00
ccflags-y +=-I$(srctree)/drivers
uart: Introduce QMSI shim driver This patch introduces the QMSI UART driver which is simply a shim driver based on UART driver provided by QMSI BSP. This initial version implements only the mandatory APIs 'poll_in', 'poll_out' and 'err_check' which are required by trivial sample apps and by output functionality from the console driver. The remaining APIs will be implemented by up coming patches. The driver supports only 115200 baud rate at the moment. In order to enable this driver, the following options should be set: CONFIG_QMSI_DRIVERS=y CONFIG_QMSI_INSTALL_PATH="/path/to/libqmsi/directory" CONFIG_SERIAL=y CONFIG_UART_QMSI=y This driver has been tested with Quark SE Devboard so this patch also adds its platform-specific default configuration options to 'arch/x86/ soc/quark_se/Kconfig'. Change-Id: Ibde1825d4b0349a376a8e7d91cc9de306946b62f Signed-off-by: Andre Guedes <andre.guedes@intel.com>
2016-02-27 01:51:28 +08:00
serial/ns16550: refactor (again) to conform to driver model () Renames ns16550.c to uart_ns16550.c. This is to follow the driver naming convention. () Renames functions ns16550_uart_*() to uart_ns16550_*(), following driver naming convention. () UART ports initialization is moved into the driver itself. All the init code in platform config files is removed. () Adds (many) Kconfig options. These don't have to be defined in each platform's board.h anymore. () Renames CONFIG_NS16550_* to CONFIG_UART_NS16550_* () Disable NS16550 for ARC as no port is defined anyway. Change-Id: I76bbe25b9bc75eb62df81e533f84f4f63a5257b7 Signed-off-by: Daniel Leung <daniel.leung@intel.com>
2015-12-02 00:42:19 +08:00
obj-$(CONFIG_UART_NS16550) += uart_ns16550.o
serial: Introduce new mcux shim driver Adds a shim layer around the mcux uart driver to adapt it to the Zephyr serial interface. Unlike the existing (and confusingly-named) uart_k20 driver, this driver can be used for k64 and other Kinetis SoCs. Implements polling and interrupt-driven serial interface functions that are logically equivalent to the uart_k20 driver. Adds an extra instance, irq_tx_empty(), and err_check() that aren't implemented in the uart_k20 driver. Jira: ZEP-719 Change-Id: Iab99542e7ec921ef4f361437768113fee01e5fe8 Signed-off-by: Maureen Helm <maureen.helm@nxp.com>
2017-01-10 02:25:59 +08:00
obj-$(CONFIG_UART_MCUX) += uart_mcux.o
serial/stellaris: refactor (again) to conform to driver model () Renames stellarisUartDrv.c to uart_stellaris.c. This is to follow the driver naming convention. () Renames functions stellaris_uart_*() to uart_stellaris_*(), following driver naming convention. () Renames CONFIG_STELLARIS_UART* to CONFIG_UART_STELLARIS* () UART ports initialization is moved into the driver itself. All the init code in platform config files is removed. () Adds (many) Kconfig options. These don't have to be defined in each platform's board.h anymore. Change-Id: I0eadc3878d69ff24d1637f8df5220fd2f161d24f Signed-off-by: Daniel Leung <daniel.leung@intel.com>
2015-12-02 00:42:19 +08:00
obj-$(CONFIG_UART_STELLARIS) += uart_stellaris.o
uart/nsim: Make config for uart/nsim explicit This adds CONFIG_UART_NSIM to enable the uart/nsim driver. This fixes compilation issue where the base address parameter is not defined due to CONFIG_NSIM=y but CONFIG_SERIAL=n. Change-Id: I1dc1c15b22ad174d4db514d89551780f0dfcae66 Signed-off-by: Daniel Leung <daniel.leung@intel.com>
2015-12-05 01:36:33 +08:00
obj-$(CONFIG_UART_NSIM) += uart_nsim.o
serial: adds UART driver for SAM3X8E This adds driver for the UART controller on Atmel SAM3X8E. This UART controller only has two wires for RX and TX, and does not have flow control (e.g. CTS, RTS) or FIFO. Currently, the driver does not support any interrupt driven operations. Change-Id: I63720bccfb70a89888353b8ee3dfc4b80793dc01 Signed-off-by: Daniel Leung <daniel.leung@intel.com>
2016-01-21 13:10:59 +08:00
obj-$(CONFIG_UART_ATMEL_SAM3) += uart_atmel_sam3.o
uart: Introduce QMSI shim driver This patch introduces the QMSI UART driver which is simply a shim driver based on UART driver provided by QMSI BSP. This initial version implements only the mandatory APIs 'poll_in', 'poll_out' and 'err_check' which are required by trivial sample apps and by output functionality from the console driver. The remaining APIs will be implemented by up coming patches. The driver supports only 115200 baud rate at the moment. In order to enable this driver, the following options should be set: CONFIG_QMSI_DRIVERS=y CONFIG_QMSI_INSTALL_PATH="/path/to/libqmsi/directory" CONFIG_SERIAL=y CONFIG_UART_QMSI=y This driver has been tested with Quark SE Devboard so this patch also adds its platform-specific default configuration options to 'arch/x86/ soc/quark_se/Kconfig'. Change-Id: Ibde1825d4b0349a376a8e7d91cc9de306946b62f Signed-off-by: Andre Guedes <andre.guedes@intel.com>
2016-02-27 01:51:28 +08:00
obj-$(CONFIG_UART_QMSI) += uart_qmsi.o
serial/stm32: add driver for STM32 UART Add driver for U(S)ART ports on STM32 MCUs. The driver implements basic RX/TX functionality. Data transmission is implemented using polling. The driver configures the port to use 8bit data transmission, 1 stop bit, no parity control. The driver exposes a public uart driver API and registers a single UART device 'UART_0'. The device binds to USART1 peripheral and performs required pinmux and clock control configuration. The device can be initialized at the PRIMARY level, with default device priority. The driver has been verified to work with a sample Hello World application on a STM32F103 series MCU. Change-Id: Iae103fcd8d2fb0a6c173cf141a68e17791255aab Origin: Original Signed-off-by: Maciej Borzecki <maciek.borzecki@gmail.com>
2016-03-03 22:33:20 +08:00
obj-$(CONFIG_UART_STM32) += uart_stm32.o
drivers: Add basic GPIO and UART support for nRF52 Add basic support for the Nordic Semiconductor's nRF52832 (nRF52 series) GPIO and UART. JIRA: ZEP-377 Change-Id: Ie3613956bae57829e26cb1cc20d3f740b5371f65 Signed-off-by: Glenn Ruben Bakke <glenn.ruben.bakke@nordicsemi.no> Signed-off-by: Vinayak Kariappa Chettimada <vinayak.kariappa.chettimada@nordicsemi.no> Signed-off-by: Håkon Alseth <haakon.alseth@nordicsemi.no> Signed-off-by: Carles Cufi <carles.cufi@nordicsemi.no>
2016-05-18 22:49:04 +08:00
obj-$(CONFIG_UART_NRF5) += uart_nrf5.o
uart_altera_jtag: add JTAG UART driver for Nios II This currently only supports outgoing messages without interrupts. Change-Id: I635562f47106eb6cdc7104a8160e431bebea25dc Signed-off-by: Andrew Boie <andrew.p.boie@intel.com>
2016-06-21 05:11:35 +08:00
obj-$(CONFIG_UART_ALTERA_JTAG) += uart_altera_jtag.o
cc3200: Add a UART driver (polled and interrupt modes) The pinmux configuration is done during board initialization. This was validated using the following Zephyr apps: - samples/hello_world - samples/philosophers - samples/drivers/uart - samples/shell UARTA0 is currently supported. Change-Id: I85727c622d4d42183cc9f2f8b43d653e245dd17e Signed-off-by: Gil Pitney <gil.pitney@linaro.org>
2016-11-01 08:46:32 +08:00
obj-$(CONFIG_UART_CC32XX) += uart_cc32xx.o
serial: Add driver for CMSDK (Cortex-M System Design Kit) APB UART Add driver for CMSDK APB UART ports. The driver implements RX and TX functionalities. Data transmission is implemented using polling and interrupts. The driver default configuration for the port is to use 8bit data transmission, 1 stop bit, no parity control. The driver exposes a public uart driver API and allows to register up to five UART devices: from 'UART_0' to 'UART_4'. The driver performs the required pinmux, the clock control configuration is left to the platform. The driver has been verified to work with the Hello World sample application on a Beetle Board. Jira: ZEP-1245 Change-Id: I5baf78b7659aae2a574d8e66205e6fd5eb579133 Signed-off-by: Vincenzo Frascino <vincenzo.frascino@linaro.org> Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
2016-09-19 22:58:03 +08:00
obj-$(CONFIG_UART_CMSDK_APB) += uart_cmsdk_apb.o
serial: added support for the riscv-qemu UART driver riscv-qemu UART: 1) comprises only one register that is used to send or receive characters in a polling fashion. 2) does not have a FIFO and is not interrupt-driven. Change-Id: I9408f1776eba4cec4aa203a5da759ec04bcddf1f Signed-off-by: Jean-Paul Etienne <fractalclone@gmail.com>
2017-01-11 07:24:31 +08:00
obj-$(CONFIG_UART_RISCV_QEMU) += uart_riscv_qemu.o