zephyr/soc/riscv32/pulpino/linker.ld

/*
 * Copyright (c) 2016 Jean-Paul Etienne <fractalclone@gmail.com>
 *
 * SPDX-License-Identifier: Apache-2.0
 */

/**
 * @brief Linker script for pulpino
 */

#include <arch/riscv32/pulpino/linker.ld>
riscv32: added support for the pulpino soc pulpino soc has custom-extended riscv ISA that is accounted for if CONFIG_RISCV_GENERIC_TOOLCHAIN is not set. (ex: bit manipulation asm opcodes) Change-Id: I4dafc4ebc2fedcc4eb6a3dedd0412816afea6004 Signed-off-by: Jean-Paul Etienne <fractalclone@gmail.com> 2017-01-11 07:24:30 +08:00			`/*`
			`* Copyright (c) 2016 Jean-Paul Etienne <fractalclone@gmail.com>`
			`*`
license: Replace Apache boilerplate with SPDX tag Replace the existing Apache 2.0 boilerplate header with an SPDX tag throughout the zephyr code tree. This patch was generated via a script run over the master branch. Also updated doc/porting/application.rst that had a dependency on line numbers in a literal include. Manually updated subsys/logging/sys_log.c that had a malformed header in the original file. Also cleanup several cases that already had a SPDX tag and we either got a duplicate or missed updating. Jira: ZEP-1457 Change-Id: I6131a1d4ee0e58f5b938300c2d2fc77d2e69572c Signed-off-by: David B. Kinder <david.b.kinder@intel.com> Signed-off-by: Kumar Gala <kumar.gala@linaro.org> 2017-01-19 09:01:01 +08:00			`* SPDX-License-Identifier: Apache-2.0`
riscv32: added support for the pulpino soc pulpino soc has custom-extended riscv ISA that is accounted for if CONFIG_RISCV_GENERIC_TOOLCHAIN is not set. (ex: bit manipulation asm opcodes) Change-Id: I4dafc4ebc2fedcc4eb6a3dedd0412816afea6004 Signed-off-by: Jean-Paul Etienne <fractalclone@gmail.com> 2017-01-11 07:24:30 +08:00			`*/`

			`/**`
			`* @brief Linker script for pulpino`
			`*/`

			`#include <arch/riscv32/pulpino/linker.ld>`