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zephyr/scripts/Makefile.toolchain.iamcu

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toolchain: add support for iamcu toolchain See https://groups.google.com/forum/#!topic/ia32-abi/cn7TM6J_TIg for more details. • Support IA32 without FPU. • Minimum ISA: Pentium ISA without x87 FPU instructions. • Don't allow mixing i386 object files with Intel MCU object files. • Support floating point with software emulation: a. Long double is the same as double. b. Use __float80 for 80-bit double. • Minimize memory footprint: a. Code size b. Data size c. Stack size Here is the draft of Intel MCU psABI. The differences from IA32 psABI are 1. The minimum instruction set is Intel Pentium ISA minus instructions for x87 floating point unit. 2. There are no x87 floating point registers. 3. There are no vector registers. 4. Segment registers are optional. 5. Support for TLS relocations are optional. 6. Scalar types larger than 4 bytes are aligned to 4 bytes. 7. There are no vector types. 8. _Decimal32, _Decimal64, and _Decimal128 types are optional. 9. long double type is the same as double. 10. float, double and long double types are passed and returned in general purpose registers. 11. _Decimal32 and _Decimal64 types are passed in general purpose registers. 12. Aggregate types no larger than 8 bytes are passed and returned in general purpose registers. 13. Stack is 4-byte aligned. 14. The auxiliary vector support is optional. 15. Register %edx has undefined value at process entry. 16. New ELF machine code: EM_IAMCU. 17. New predefined C/C++ pre-processor symbols: __iamcu and __iamcu__ Change-Id: I6a0c45ad22d8f710b6f37a041aaa2fc1bf0b1c39 Signed-off-by: Anas Nashif <anas.nashif@intel.com>
2015-06-20 11:37:23 +08:00
ifndef IAMCU_TOOLCHAIN_PATH
$(error IAMCU_TOOLCHAIN_PATH is not set)
endif
CROSS_COMPILE_TARGET_x86 = i586-intel-elfiamcu
CROSS_COMPILE_x86_version = 4.9.3
CROSS_COMPILE_x86=${IAMCU_TOOLCHAIN_PATH}/bin/${CROSS_COMPILE_TARGET_x86}-
toolchain: extend iamcu variant to support provided libc Change-Id: I2c6681a4ea3a4c8bc2367a5e9d6baeabc5a0dd90 Signed-off-by: Anas Nashif <anas.nashif@intel.com>
2015-10-08 22:15:43 +08:00
TOOLCHAIN_CFLAGS_x86 = -I${IAMCU_TOOLCHAIN_PATH}/$(CROSS_COMPILE_TARGET_x86)/include/
toolchain: add support for iamcu toolchain See https://groups.google.com/forum/#!topic/ia32-abi/cn7TM6J_TIg for more details. • Support IA32 without FPU. • Minimum ISA: Pentium ISA without x87 FPU instructions. • Don't allow mixing i386 object files with Intel MCU object files. • Support floating point with software emulation: a. Long double is the same as double. b. Use __float80 for 80-bit double. • Minimize memory footprint: a. Code size b. Data size c. Stack size Here is the draft of Intel MCU psABI. The differences from IA32 psABI are 1. The minimum instruction set is Intel Pentium ISA minus instructions for x87 floating point unit. 2. There are no x87 floating point registers. 3. There are no vector registers. 4. Segment registers are optional. 5. Support for TLS relocations are optional. 6. Scalar types larger than 4 bytes are aligned to 4 bytes. 7. There are no vector types. 8. _Decimal32, _Decimal64, and _Decimal128 types are optional. 9. long double type is the same as double. 10. float, double and long double types are passed and returned in general purpose registers. 11. _Decimal32 and _Decimal64 types are passed in general purpose registers. 12. Aggregate types no larger than 8 bytes are passed and returned in general purpose registers. 13. Stack is 4-byte aligned. 14. The auxiliary vector support is optional. 15. Register %edx has undefined value at process entry. 16. New ELF machine code: EM_IAMCU. 17. New predefined C/C++ pre-processor symbols: __iamcu and __iamcu__ Change-Id: I6a0c45ad22d8f710b6f37a041aaa2fc1bf0b1c39 Signed-off-by: Anas Nashif <anas.nashif@intel.com>
2015-06-20 11:37:23 +08:00
CROSS_COMPILE= $(CROSS_COMPILE_$(ARCH))
LIB_INCLUDE_DIR_x86 = -L $(IAMCU_TOOLCHAIN_PATH)/lib/gcc/$(CROSS_COMPILE_TARGET_x86)/$(CROSS_COMPILE_x86_version)
toolchain: extend iamcu variant to support provided libc Change-Id: I2c6681a4ea3a4c8bc2367a5e9d6baeabc5a0dd90 Signed-off-by: Anas Nashif <anas.nashif@intel.com>
2015-10-08 22:15:43 +08:00
LIB_INCLUDE_DIR_x86 += -L ${IAMCU_TOOLCHAIN_PATH}/$(CROSS_COMPILE_TARGET_x86)/lib
toolchain: add support for iamcu toolchain See https://groups.google.com/forum/#!topic/ia32-abi/cn7TM6J_TIg for more details. • Support IA32 without FPU. • Minimum ISA: Pentium ISA without x87 FPU instructions. • Don't allow mixing i386 object files with Intel MCU object files. • Support floating point with software emulation: a. Long double is the same as double. b. Use __float80 for 80-bit double. • Minimize memory footprint: a. Code size b. Data size c. Stack size Here is the draft of Intel MCU psABI. The differences from IA32 psABI are 1. The minimum instruction set is Intel Pentium ISA minus instructions for x87 floating point unit. 2. There are no x87 floating point registers. 3. There are no vector registers. 4. Segment registers are optional. 5. Support for TLS relocations are optional. 6. Scalar types larger than 4 bytes are aligned to 4 bytes. 7. There are no vector types. 8. _Decimal32, _Decimal64, and _Decimal128 types are optional. 9. long double type is the same as double. 10. float, double and long double types are passed and returned in general purpose registers. 11. _Decimal32 and _Decimal64 types are passed in general purpose registers. 12. Aggregate types no larger than 8 bytes are passed and returned in general purpose registers. 13. Stack is 4-byte aligned. 14. The auxiliary vector support is optional. 15. Register %edx has undefined value at process entry. 16. New ELF machine code: EM_IAMCU. 17. New predefined C/C++ pre-processor symbols: __iamcu and __iamcu__ Change-Id: I6a0c45ad22d8f710b6f37a041aaa2fc1bf0b1c39 Signed-off-by: Anas Nashif <anas.nashif@intel.com>
2015-06-20 11:37:23 +08:00
LIB_INCLUDE_DIR = $(LIB_INCLUDE_DIR_$(ARCH))
TOOLCHAIN_LIBS = gcc
toolchain: extend iamcu variant to support provided libc Change-Id: I2c6681a4ea3a4c8bc2367a5e9d6baeabc5a0dd90 Signed-off-by: Anas Nashif <anas.nashif@intel.com>
2015-10-08 22:15:43 +08:00
TOOLCHAIN_CFLAGS = $(TOOLCHAIN_CFLAGS_$(ARCH))
toolchain: add support for iamcu toolchain See https://groups.google.com/forum/#!topic/ia32-abi/cn7TM6J_TIg for more details. • Support IA32 without FPU. • Minimum ISA: Pentium ISA without x87 FPU instructions. • Don't allow mixing i386 object files with Intel MCU object files. • Support floating point with software emulation: a. Long double is the same as double. b. Use __float80 for 80-bit double. • Minimize memory footprint: a. Code size b. Data size c. Stack size Here is the draft of Intel MCU psABI. The differences from IA32 psABI are 1. The minimum instruction set is Intel Pentium ISA minus instructions for x87 floating point unit. 2. There are no x87 floating point registers. 3. There are no vector registers. 4. Segment registers are optional. 5. Support for TLS relocations are optional. 6. Scalar types larger than 4 bytes are aligned to 4 bytes. 7. There are no vector types. 8. _Decimal32, _Decimal64, and _Decimal128 types are optional. 9. long double type is the same as double. 10. float, double and long double types are passed and returned in general purpose registers. 11. _Decimal32 and _Decimal64 types are passed in general purpose registers. 12. Aggregate types no larger than 8 bytes are passed and returned in general purpose registers. 13. Stack is 4-byte aligned. 14. The auxiliary vector support is optional. 15. Register %edx has undefined value at process entry. 16. New ELF machine code: EM_IAMCU. 17. New predefined C/C++ pre-processor symbols: __iamcu and __iamcu__ Change-Id: I6a0c45ad22d8f710b6f37a041aaa2fc1bf0b1c39 Signed-off-by: Anas Nashif <anas.nashif@intel.com>
2015-06-20 11:37:23 +08:00
LD_TOOLCHAIN ?= -D__GCC_LINKER_CMD__ -D__IAMCU
OUTPUT_FORMAT = elf32-iamcu
OUTPUT_ARCH = iamcu:intel
toolchain: extend iamcu variant to support provided libc Change-Id: I2c6681a4ea3a4c8bc2367a5e9d6baeabc5a0dd90 Signed-off-by: Anas Nashif <anas.nashif@intel.com>
2015-10-08 22:15:43 +08:00
export CROSS_COMPILE TOOLCHAIN_LIBS LIB_INCLUDE_DIR TOOLCHAIN_CFLAGS