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zephyr/arch/common/CMakeLists.txt

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license: cleanup: add SPDX Apache-2.0 license identifier Update the files which contain no license information with the 'Apache-2.0' SPDX license identifier. Many source files in the tree are missing licensing information, which makes it harder for compliance tools to determine the correct license. By default all files without license information are under the default license of Zephyr, which is Apache version 2. Signed-off-by: Anas Nashif <anas.nashif@intel.com>
2019-04-06 21:08:09 +08:00
# SPDX-License-Identifier: Apache-2.0
benchmarking: remove execution benchmarking code This code had one purpose only, feed timing information into a test and was not used by anything else. The custom trace points unfortunatly were not accurate and this test was delivering informatin that conflicted with other tests we have due to placement of such trace points in the architecture and kernel code. For such measurements we are planning to use the tracing functionality in a special mode that would be used for metrics without polluting the architecture and kernel code with additional tracing and timing code. Furthermore, much of the assembly code used had issues. Signed-off-by: Anas Nashif <anas.nashif@intel.com> Signed-off-by: Daniel Leung <daniel.leung@intel.com>
2020-09-05 08:39:25 +08:00
if(CONFIG_GEN_ISR_TABLES)
arch: Simplify private header include path configuration. When compiling the components under the arch directory, the compiler include paths for arch and kernel private headers need to be specified. This was previously done by adding 'zephyr_library_include_directories' to CMakeLists.txt file for every component under the arch directory, and this resulted in a significant amount of duplicate code. This commit uses the CMake 'include_directories' command in the root CMakeLists.txt to simplify specification of the private header include paths for all the arch components. Signed-off-by: Stephanos Ioannidis <root@stephanos.io>
2019-11-01 19:10:26 +08:00
zephyr_library()
zephyr_library_sources_ifdef(
CONFIG_GEN_ISR_TABLES
sw_isr_common.c
)
endif()
arch: default timings for all architectures Use default if architecture does not have a custom timing implementation. Signed-off-by: Anas Nashif <anas.nashif@intel.com>
2020-08-28 11:07:01 +08:00
if(NOT CONFIG_ARCH_HAS_TIMING_FUNCTIONS AND
NOT CONFIG_SOC_HAS_TIMING_FUNCTIONS AND
NOT CONFIG_BOARD_HAS_TIMING_FUNCTIONS)
zephyr_library_sources_ifdef(CONFIG_TIMING_FUNCTIONS timing.c)
endif()
Introduce cmake-based rewrite of KBuild Introducing CMake is an important step in a larger effort to make Zephyr easy to use for application developers working on different platforms with different development environment needs. Simplified, this change retains Kconfig as-is, and replaces all Makefiles with CMakeLists.txt. The DSL-like Make language that KBuild offers is replaced by a set of CMake extentions. These extentions have either provided simple one-to-one translations of KBuild features or introduced new concepts that replace KBuild concepts. This is a breaking change for existing test infrastructure and build scripts that are maintained out-of-tree. But for FW itself, no porting should be necessary. For users that just want to continue their work with minimal disruption the following should suffice: Install CMake 3.8.2+ Port any out-of-tree Makefiles to CMake. Learn the absolute minimum about the new command line interface: $ cd samples/hello_world $ mkdir build && cd build $ cmake -DBOARD=nrf52_pca10040 .. $ cd build $ make PR: zephyrproject-rtos#4692 docs: http://docs.zephyrproject.org/getting_started/getting_started.html Signed-off-by: Sebastian Boe <sebastian.boe@nordicsemi.no>
2017-10-27 21:43:34 +08:00
# Put functions and data in their own binary sections so that ld can
# garbage collect them
zephyr_cc_option(-ffunction-sections -fdata-sections)
arch: Put intlist.ld into Cmake Remove from linker.ld Signed-off-by: Øyvind Rønningstad <oyvind.ronningstad@nordicsemi.no>
2019-03-20 20:10:48 +08:00
zephyr_linker_sources_ifdef(CONFIG_GEN_ISR_TABLES
SECTIONS
arch: gen_isr_tables: migrate to <zephyr/...> include prefix The gen_usr_tables scripts were not updated to make use of the <zephyr/...> include prefix, fix this. Signed-off-by: Gerard Marull-Paretas <gerard.marull@nordicsemi.no>
2022-05-09 19:52:12 +08:00
${ZEPHYR_BASE}/include/zephyr/linker/intlist.ld
arch: Put intlist.ld into Cmake Remove from linker.ld Signed-off-by: Øyvind Rønningstad <oyvind.ronningstad@nordicsemi.no>
2019-03-20 20:10:48 +08:00
)
arch: Port the ramfunc section to the Cmake function Remove it from linker.ld Signed-off-by: Øyvind Rønningstad <oyvind.ronningstad@nordicsemi.no>
2019-03-13 00:15:32 +08:00
irq: Fix IRQ vector table relocation The generation of the software ISR table and the IRQ vector table (respectively generated by CONFIG_GEN_SW_ISR_TABLE and CONFIG_GEN_IRQ_VECTOR_TABLE) should (in theory) go through three stages: 1. A placeholder table is generated in arch/common/isr_tables.c and placed in an orphaned .gnu.linkonce.{irq_vector_table, sw_isr_table} section 2. The real table is generated by arch/common/gen_isr_tables.py (creating the build/zephyr/isr_tables.c file) 3. The real table is un-orphaned by moving it in a proper section with a proper alignment While all the steps are done automatically for the software ISR table, for the IRQ vector table each architectures must take care of modiying its own linker script to place somewhere the generated IRQ vector table (basically step 3 is missing). This is currently only done for 2 architectures: Cortex-M (ARMv7) and ARC. But when another architecture tries to use the IRQ vector table, the linker complains about that. For example: Linking C executable zephyr/zephyr.elf riscv64-zephyr-elf/bin/ld.bfd: warning: orphan section `.gnu.linkonce.irq_vector_table' from `zephyr/CMakeFiles/zephyr_final.dir/isr_tables.c.obj' being placed in section `.gnu.linkonce.irq_vector_table' In this patch we introduce a new CONFIG_ARCH_IRQ_VECTOR_TABLE_ALIGN to support the architectures requiring a special alignment for the IRQ vector table and we also introduce a way to automatically place the IRQ vector table in place in the same way it is done for the ISR software table. Signed-off-by: Carlo Caione <ccaione@baylibre.com>
2022-06-21 20:26:03 +08:00
zephyr_linker_sources_ifdef(CONFIG_GEN_IRQ_VECTOR_TABLE
ROM_START
SORT_KEY 0x0vectors
${ZEPHYR_BASE}/include/zephyr/linker/irq-vector-table-section.ld
)
arch: linker: specify intList section in the IDT_LIST region This commit specifies the intList section in the IDT_LIST region in the arch/common CMakeLists.txt file. It uses zephyr_linker_section to setup the intList section for first pass linker file and configures the section to hold irq_info and intList input section. For second pass linker file, the irq_info and intList input sections are placed in the /DISCARD/ section. Signed-off-by: Torsten Rasmussen <Torsten.Rasmussen@nordicsemi.no>
2021-06-01 16:04:31 +08:00
if(CONFIG_GEN_ISR_TABLES)
cmake: CMake linker script generator pass handling To prepare for linker script creation with flexible number of linker passes depending on system configuration then the Zephyr CMake linker script generator has been updated to use pass names instead of pass numbers. This allows greater flexibility as a section can now be active based on the settings on the pass and not the linking pass index number. As part of this, the `PASS` processing in `linker_script_common.cmake` has been adjusted so that it properly handles when a linking pass is handling multiple settings, such as both `LINKER_APP_SMEM_UNALIGNED` and `DEVICE_HANDLES_PASS1` in same linking pass. As the number of linking passes are more flexible, then the PASS argument in `zephyr_linker_section()` and `zephyr_linker_section_configure()` has been updated to also support a `NOT <name>` argument, for example: `PASS NOT LINKER_ZEPHYR_FINAL`. Signed-off-by: Torsten Rasmussen <Torsten.Rasmussen@nordicsemi.no>
2021-11-01 20:22:55 +08:00
zephyr_linker_section(NAME .intList VMA IDT_LIST LMA IDT_LIST NOINPUT PASS NOT LINKER_ZEPHYR_FINAL)
arch: linker: specify intList section in the IDT_LIST region This commit specifies the intList section in the IDT_LIST region in the arch/common CMakeLists.txt file. It uses zephyr_linker_section to setup the intList section for first pass linker file and configures the section to hold irq_info and intList input section. For second pass linker file, the irq_info and intList input sections are placed in the /DISCARD/ section. Signed-off-by: Torsten Rasmussen <Torsten.Rasmussen@nordicsemi.no>
2021-06-01 16:04:31 +08:00
zephyr_linker_section_configure(SECTION .intList KEEP INPUT ".irq_info" FIRST)
zephyr_linker_section_configure(SECTION .intList KEEP INPUT ".intList")
cmake: CMake linker script generator pass handling To prepare for linker script creation with flexible number of linker passes depending on system configuration then the Zephyr CMake linker script generator has been updated to use pass names instead of pass numbers. This allows greater flexibility as a section can now be active based on the settings on the pass and not the linking pass index number. As part of this, the `PASS` processing in `linker_script_common.cmake` has been adjusted so that it properly handles when a linking pass is handling multiple settings, such as both `LINKER_APP_SMEM_UNALIGNED` and `DEVICE_HANDLES_PASS1` in same linking pass. As the number of linking passes are more flexible, then the PASS argument in `zephyr_linker_section()` and `zephyr_linker_section_configure()` has been updated to also support a `NOT <name>` argument, for example: `PASS NOT LINKER_ZEPHYR_FINAL`. Signed-off-by: Torsten Rasmussen <Torsten.Rasmussen@nordicsemi.no>
2021-11-01 20:22:55 +08:00
zephyr_linker_section_configure(SECTION /DISCARD/ KEEP INPUT ".irq_info" PASS LINKER_ZEPHYR_FINAL)
zephyr_linker_section_configure(SECTION /DISCARD/ KEEP INPUT ".intList" PASS LINKER_ZEPHYR_FINAL)
arch: linker: specify intList section in the IDT_LIST region This commit specifies the intList section in the IDT_LIST region in the arch/common CMakeLists.txt file. It uses zephyr_linker_section to setup the intList section for first pass linker file and configures the section to hold irq_info and intList input section. For second pass linker file, the irq_info and intList input sections are placed in the /DISCARD/ section. Signed-off-by: Torsten Rasmussen <Torsten.Rasmussen@nordicsemi.no>
2021-06-01 16:04:31 +08:00
endif()
arch: Port the ramfunc section to the Cmake function Remove it from linker.ld Signed-off-by: Øyvind Rønningstad <oyvind.ronningstad@nordicsemi.no>
2019-03-13 00:15:32 +08:00
zephyr_linker_sources_ifdef(CONFIG_ARCH_HAS_RAMFUNC_SUPPORT
RAM_SECTIONS
ramfunc.ld
)
arch: port nocache linker code to use Cmake function Remove from linker.ld Signed-off-by: Øyvind Rønningstad <oyvind.ronningstad@nordicsemi.no>
2019-03-20 20:04:45 +08:00
zephyr_linker_sources_ifdef(CONFIG_NOCACHE_MEMORY
RAM_SECTIONS
nocache.ld
)
arm, x86, riscv: linker.ld: Move TEXT_SECTION_OFFSET to its own linker file snippet so snippets can be placed before it. Using zephyr_linker_sources(). Signed-off-by: Øyvind Rønningstad <oyvind.ronningstad@nordicsemi.no>
2019-11-29 20:31:00 +08:00
config: Rename TEXT_SECTION_OFFSET to ROM_START_OFFSET The `TEXT_SECTION_OFFSET` symbol is used to specify the offset between the beginning of the ROM area and the address of the first ROM section. This commit renames `TEXT_SECTION_OFFSET` to `ROM_START_OFFSET` because the first ROM section is not always the `.text` section. Signed-off-by: Stephanos Ioannidis <root@stephanos.io>
2020-02-10 15:37:24 +08:00
# Only ARM, X86 and OPENISA_RV32M1_RISCV32 use ROM_START_OFFSET.
arm/arm64: Make ARM64 a standalone architecture Split ARM and ARM64 architectures. Details: - CONFIG_ARM64 is decoupled from CONFIG_ARM (not a subset anymore) - Arch and include AArch64 files are in a dedicated directory (arch/arm64 and include/arch/arm64) - AArch64 boards and SoC are moved to soc/arm64 and boards/arm64 - AArch64-specific DTS files are moved to dts/arm64 - The A72 support for the bcm_vk/viper board is moved in the boards/bcm_vk/viper directory Signed-off-by: Carlo Caione <ccaione@baylibre.com>
2021-03-25 18:56:15 +08:00
if (DEFINED CONFIG_ARM OR DEFINED CONFIG_X86 OR DEFINED CONFIG_ARM64
extensions.cmake: Replace TEXT_START with ROM_START In zephyr_linker_sources(). This is done since the point of the location is to place things at given offsets. This can only be done consistenly if the linker code is placed into the _first_ section. All uses of TEXT_START are replaced with ROM_START. ROM_START is only supported in some arches, as some arches have several custom sections before text. These don't currently have ROM_START or TEXT_START available, but that could be added with a bit of refactoring in their linker script. No SORT_KEYs are changed. This also fixes an error introduced when TEXT_START was added, where TEXT_SECTION_OFFSET was applied to riscv's common linker.ld instead of to openisa_rv32m1's specific linker.ld. Signed-off-by: Øyvind Rønningstad <oyvind.ronningstad@nordicsemi.no>
2020-01-17 21:36:19 +08:00
OR DEFINED CONFIG_SOC_OPENISA_RV32M1_RISCV32)
arch/common: Fix moving location counter backwards when using LLD In GNU LD, the location counter (the 'dot' variable) always refers to the byte offset from the start of current object as mentioned in documentation[1]: ``` '.' actually refers to the byte offset from the start of the current containing object. Normally this is the SECTIONS statement, whose start address is 0, hence '.' can be used as an absolute address. If '.' is used inside a section description however, it refers to the byte offset from the start of that section, not an absolute address. ``` For example, if the section 'rom_start': rom_start : { . = 0x400; _vector_start = ABSOLUTE(.); } > FLASH has a starting address of 0x8000000, then _vector_start will be 0x8000400 However, behavior of LLVM LLD is quite different, the value of the location counter is always absolute (see discussion [2]), so in the example above, the linker will return error, because it will interpret '. = 0x400' as an attempt to move the location counter backwards. It could be fixed by changing line to '. += 0x400' (#54796) which will move the location counter by 0x400 for both linkers, but it would work only when we are at the beginning of section. Consider the following example: rom_start : { . = 0x400; KEEP(*(.boot_hdr.conf)) . = 0x1000; KEEP(*(.boot_hdr.ivt)) KEEP(*(.boot_hdr.data)) KEEP(*(.boot_hdr.dcd_data)) . = 0x2000; _vector_start = .; } > FLASH In this case, _vector_start will be 0x2000, but if we change '. = 0x2000' to '. += 0x2000', then the value of _vector_start depends on size of data in input sections (but it's 0x3000 at least). Actually, this example comes from final linker script when compiling firmware for mimxrt1170_evk_cm7 board. This board failed to boot (#55296) after #54796 was merged. This patch introduces method compatible with both linkers. We calculate relative offset from the beginning of the section and use that value to calculate number of bytes by which we should move the location counter to get CONFIG_ROM_START_OFFSET. [1] https://sourceware.org/binutils/docs/ld/Location-Counter.html [2] https://discourse.llvm.org/t/lld-location-counter-inside-objects Signed-off-by: Patryk Duda <pdk@semihalf.com>
2023-05-26 19:47:08 +08:00
# Exclamation mark is printable character with lowest number in ASCII table.
# We are sure that this file will be included as a first.
zephyr_linker_sources(ROM_START SORT_KEY ! rom_start_address.ld)
config: Rename TEXT_SECTION_OFFSET to ROM_START_OFFSET The `TEXT_SECTION_OFFSET` symbol is used to specify the offset between the beginning of the ROM area and the address of the first ROM section. This commit renames `TEXT_SECTION_OFFSET` to `ROM_START_OFFSET` because the first ROM section is not always the `.text` section. Signed-off-by: Stephanos Ioannidis <root@stephanos.io>
2020-02-10 15:37:24 +08:00
zephyr_linker_sources(ROM_START SORT_KEY 0x0 rom_start_offset.ld)
cmake: linker: converter arm and common ld scripts into CMake code Converted existing ld script templates into CMake files. This commit takes the common-ram.ld, common-rom.ld, debug-sections.ld, and thread-local-storage.ld and creates corresponding CMake files for the linker script generator. The CMake files uses the new Zephyr CMake functions: - zephyr_linker_section() - zephyr_linker_section_configure() - zephyr_linker_section_obj_level() to generate the same linker result as the existing C preprocessor based scheme. Signed-off-by: Torsten Rasmussen <Torsten.Rasmussen@nordicsemi.no>
2021-05-06 17:49:35 +08:00
# Handled in ld.cmake
arm, x86, riscv: linker.ld: Move TEXT_SECTION_OFFSET to its own linker file snippet so snippets can be placed before it. Using zephyr_linker_sources(). Signed-off-by: Øyvind Rønningstad <oyvind.ronningstad@nordicsemi.no>
2019-11-29 20:31:00 +08:00
endif()
isr_tables: don't whole-archive library As of today we have a bit weird situation with generated sw_isr_table / irq_vector_table tables. On the final linkage stage we pass two files which content section with sw_isr_table / irq_vector_table. They are * libarch__common.a (with an outdated tables from the first linkage stage) * isr_tables.c.obj (with an actual tables) The sections where tables are located are marked with ".gnu.linkonce" prefix. That means: <<<As a GNU extension, if the name begins with .gnu.linkonce, we only link a single copy of the section.>>> However the "libarch__common.a" is passed to linker with "--whole-archive" option which means <<<include every object file in the archive in the link, rather than searching the archive for the required object files>>> That combination confuses MWDT linker and breaks linkage with MWDT toolchain. As a simple fix we can move the sw_isr_table / irq_vector_table sections to their own library and link this library with "--no-whole-archive" option. Signed-off-by: Eugeniy Paltsev <Eugeniy.Paltsev@synopsys.com>
2020-08-18 03:50:26 +08:00
# isr_tables is a normal CMake library and not a zephyr_library because it
# should not be --whole-archive'd
if (CONFIG_GEN_ISR_TABLES)
add_library(isr_tables
isr_tables.c
)
add_dependencies(isr_tables zephyr_generated_headers)
target_link_libraries(isr_tables zephyr_interface)
zephyr_library_link_libraries(isr_tables)
endif()
cmake: Support coverage flags on all archs Most arch's CMakeLists.txt contain rules to add compiler and linker flags for coverage if CONFIG_COVERAGE is enabled, but 4 of them were missing this. Instead, set the coverage flags in arch/common/CMakeLists.txt which affects all archs. Signed-off-by: Jeremy Bettis <jbettis@chromium.org>
2021-06-04 04:33:39 +08:00
if(CONFIG_COVERAGE)
zephyr_compile_options($<TARGET_PROPERTY:compiler,coverage>)
native_sim: Add new native_sim board Add the new native_sim board, based on the native simulator. Signed-off-by: Alberto Escolar Piedras <alberto.escolar.piedras@nordicsemi.no>
2023-06-07 16:39:48 +08:00
zephyr_link_libraries_ifndef(CONFIG_NATIVE_LIBRARY $<TARGET_PROPERTY:linker,coverage>)
cmake: Support coverage flags on all archs Most arch's CMakeLists.txt contain rules to add compiler and linker flags for coverage if CONFIG_COVERAGE is enabled, but 4 of them were missing this. Instead, set the coverage flags in arch/common/CMakeLists.txt which affects all archs. Signed-off-by: Jeremy Bettis <jbettis@chromium.org>
2021-06-04 04:33:39 +08:00
endif()
arch: common: semihost: add semihosting operations Add an API that utilizes the ARM semihosting mechanism to interact with the host system when a device is being emulated or run under a debugger. RISCV is implemented in terms of the ARM implementation, and therefore the ARM definitions cross enough architectures to be defined 'common'. Functionality is exposed as a separate API instead of syscall implementations (`_lseek`, `_open`, etc) due to various quirks with the ARM mechanisms that means function arguments are not standard. For more information see: https://developer.arm.com/documentation/dui0471/m/what-is-semihosting- Signed-off-by: Jordan Yates <jordan.yates@data61.csiro.au> impl
2022-03-30 18:43:41 +08:00
zephyr_sources_ifdef(CONFIG_SEMIHOST semihost.c)