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zephyr/drivers/pm_cpu_ops/Kconfig

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aarch64: pm_cpu_ops: Introduce pm_cpu_ops subsystem AArch64 has support for PSCI. This is especially useful for SMP because PSCI is used to power on the secordary cores. When the PSCI driver was introduced in Zephyr it was designed to rely on a very PSCI-centric subsystem / interface. There are two kinds of problems with this choice: 1. PSCI is only defined for the non-secure world and it is designed to boot CPU cores into non-secure state (that means that PSCI is only supposed to work if Zephyr is running in non-secure state) 2. There can be other ways or standards used to start / stop a core different from PSCI This patch is trying to fix the original wrong assumption by making the interface / subsystem a generic one, called 'pm_cpu_ops', and using PSCI only as an actual driver that is a user of this new interface / subsystem. For now the new subsystem is only exposing two methods: cpu_on and cpu_off, others will probably follow according to the needs. Signed-off-by: Carlo Caione <ccaione@baylibre.com>
2021-03-01 15:57:15 +08:00
# CPU power management driver configuration options
drivers: PSCI: Add driver and subsystem Firmware implementing the PSCI functions described in ARM document number ARM DEN 0022A ("Power State Coordination Interface System Software on ARM processors") can be used by Zephyr to initiate various CPU-centric power operations. It is needed for virtualization, it is used to coordinate OSes and hypervisors and it provides the functions used for SMP bring-up such as CPU_ON and CPU_OFF. A new PSCI driver is introduced to setup a proper subsystem used to communicate with the PSCI firmware, implementing the basic operations: get_version, cpu_on, cpu_off and affinity_info. The current implementation only supports PSCI 0.2 and PSCI 1.0 The PSCI conduit (SMC or HVC) is setup reading the corresponding property in the DTS node. Signed-off-by: Carlo Caione <ccaione@baylibre.com>
2020-12-19 22:52:48 +08:00
aarch64: pm_cpu_ops: Introduce pm_cpu_ops subsystem AArch64 has support for PSCI. This is especially useful for SMP because PSCI is used to power on the secordary cores. When the PSCI driver was introduced in Zephyr it was designed to rely on a very PSCI-centric subsystem / interface. There are two kinds of problems with this choice: 1. PSCI is only defined for the non-secure world and it is designed to boot CPU cores into non-secure state (that means that PSCI is only supposed to work if Zephyr is running in non-secure state) 2. There can be other ways or standards used to start / stop a core different from PSCI This patch is trying to fix the original wrong assumption by making the interface / subsystem a generic one, called 'pm_cpu_ops', and using PSCI only as an actual driver that is a user of this new interface / subsystem. For now the new subsystem is only exposing two methods: cpu_on and cpu_off, others will probably follow according to the needs. Signed-off-by: Carlo Caione <ccaione@baylibre.com>
2021-03-01 15:57:15 +08:00
# Copyright (c) 2021 Carlo Caione <ccaione@baylibre.com>
drivers: PSCI: Add driver and subsystem Firmware implementing the PSCI functions described in ARM document number ARM DEN 0022A ("Power State Coordination Interface System Software on ARM processors") can be used by Zephyr to initiate various CPU-centric power operations. It is needed for virtualization, it is used to coordinate OSes and hypervisors and it provides the functions used for SMP bring-up such as CPU_ON and CPU_OFF. A new PSCI driver is introduced to setup a proper subsystem used to communicate with the PSCI firmware, implementing the basic operations: get_version, cpu_on, cpu_off and affinity_info. The current implementation only supports PSCI 0.2 and PSCI 1.0 The PSCI conduit (SMC or HVC) is setup reading the corresponding property in the DTS node. Signed-off-by: Carlo Caione <ccaione@baylibre.com>
2020-12-19 22:52:48 +08:00
# SPDX-License-Identifier: Apache-2.0
aarch64: pm_cpu_ops: Introduce pm_cpu_ops subsystem AArch64 has support for PSCI. This is especially useful for SMP because PSCI is used to power on the secordary cores. When the PSCI driver was introduced in Zephyr it was designed to rely on a very PSCI-centric subsystem / interface. There are two kinds of problems with this choice: 1. PSCI is only defined for the non-secure world and it is designed to boot CPU cores into non-secure state (that means that PSCI is only supposed to work if Zephyr is running in non-secure state) 2. There can be other ways or standards used to start / stop a core different from PSCI This patch is trying to fix the original wrong assumption by making the interface / subsystem a generic one, called 'pm_cpu_ops', and using PSCI only as an actual driver that is a user of this new interface / subsystem. For now the new subsystem is only exposing two methods: cpu_on and cpu_off, others will probably follow according to the needs. Signed-off-by: Carlo Caione <ccaione@baylibre.com>
2021-03-01 15:57:15 +08:00
menuconfig PM_CPU_OPS
bool "CPU power management drivers"
help
Enable CPU power management drivers configuration
if PM_CPU_OPS
module = PM_CPU_OPS
module-str = pm_cpu_ops
source "subsys/logging/Kconfig.template.log_config"
config PM_CPU_OPS_HAS_DRIVER
bool
config PM_CPU_OPS_PSCI
drivers: PSCI: Add driver and subsystem Firmware implementing the PSCI functions described in ARM document number ARM DEN 0022A ("Power State Coordination Interface System Software on ARM processors") can be used by Zephyr to initiate various CPU-centric power operations. It is needed for virtualization, it is used to coordinate OSes and hypervisors and it provides the functions used for SMP bring-up such as CPU_ON and CPU_OFF. A new PSCI driver is introduced to setup a proper subsystem used to communicate with the PSCI firmware, implementing the basic operations: get_version, cpu_on, cpu_off and affinity_info. The current implementation only supports PSCI 0.2 and PSCI 1.0 The PSCI conduit (SMC or HVC) is setup reading the corresponding property in the DTS node. Signed-off-by: Carlo Caione <ccaione@baylibre.com>
2020-12-19 22:52:48 +08:00
bool "Support for the ARM Power State Coordination Interface (PSCI)"
drivers: pm_cpu_ops: Update Kconfig * Utilize DT_HAS_<COMPAT>_ENABLED for devicetree based drivers Signed-off-by: Kumar Gala <galak@kernel.org>
2022-08-12 11:16:02 +08:00
default y
depends on DT_HAS_ARM_PSCI_0_2_ENABLED
aarch64: pm_cpu_ops: Introduce pm_cpu_ops subsystem AArch64 has support for PSCI. This is especially useful for SMP because PSCI is used to power on the secordary cores. When the PSCI driver was introduced in Zephyr it was designed to rely on a very PSCI-centric subsystem / interface. There are two kinds of problems with this choice: 1. PSCI is only defined for the non-secure world and it is designed to boot CPU cores into non-secure state (that means that PSCI is only supposed to work if Zephyr is running in non-secure state) 2. There can be other ways or standards used to start / stop a core different from PSCI This patch is trying to fix the original wrong assumption by making the interface / subsystem a generic one, called 'pm_cpu_ops', and using PSCI only as an actual driver that is a user of this new interface / subsystem. For now the new subsystem is only exposing two methods: cpu_on and cpu_off, others will probably follow according to the needs. Signed-off-by: Carlo Caione <ccaione@baylibre.com>
2021-03-01 15:57:15 +08:00
select PM_CPU_OPS_HAS_DRIVER
drivers: PSCI: Add driver and subsystem Firmware implementing the PSCI functions described in ARM document number ARM DEN 0022A ("Power State Coordination Interface System Software on ARM processors") can be used by Zephyr to initiate various CPU-centric power operations. It is needed for virtualization, it is used to coordinate OSes and hypervisors and it provides the functions used for SMP bring-up such as CPU_ON and CPU_OFF. A new PSCI driver is introduced to setup a proper subsystem used to communicate with the PSCI firmware, implementing the basic operations: get_version, cpu_on, cpu_off and affinity_info. The current implementation only supports PSCI 0.2 and PSCI 1.0 The PSCI conduit (SMC or HVC) is setup reading the corresponding property in the DTS node. Signed-off-by: Carlo Caione <ccaione@baylibre.com>
2020-12-19 22:52:48 +08:00
help
Say Y here if you want Zephyr to communicate with system firmware
implementing the PSCI specification for CPU-centric power
management operations described in ARM document number ARM DEN
0022A ("Power State Coordination Interface System Software on
ARM processors").
endif