2017-10-17 11:28:15 +08:00
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# Copyright (c) 2017 Linaro Limited
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# SPDX-License-Identifier: Apache-2.0
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# The following blog post is an excellent resource about pulse timing:
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#
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# https://wp.josh.com/2014/05/13/ws2812-neopixels-are-not-so-finicky-once-you-get-to-know-them/
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menuconfig WS2812_STRIP
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bool "Enable WS2812 (and compatible) LED strip driver"
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depends on SPI
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help
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2019-11-01 17:24:07 +08:00
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Enable LED strip driver for daisy chains of WS2812-ish
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(or WS2812B, WS2813, SK6812, or compatible) devices.
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These devices have a one-wire communications interface
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which encodes bits using pulses. Short pulses indicate
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zero bits, and long pulses indicate ones; refer to the
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chip datasheets for precise specifications. To implement
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this in a multitasking operating system, this driver
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generates the pulses using a SPI peripheral.
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2017-10-17 11:28:15 +08:00
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if WS2812_STRIP
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2018-05-25 01:03:57 +08:00
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config WS2812_STRIP_MAX_PIXELS
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int "Maximum number of pixels in a strip"
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default 12
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help
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2019-11-01 17:24:07 +08:00
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Set this to the maximum number of pixels you need
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to control at once. There is an 8x memory penalty associated
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with each increment of this value, so it's worth optimizing.
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2018-05-25 01:03:57 +08:00
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2017-10-17 11:28:15 +08:00
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config WS2812_STRIP_ONE_FRAME
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hex "SPI frame to shift out to signal a one bit"
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2018-02-21 23:12:10 +08:00
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default 0x7c if SOC_SERIES_STM32F4X
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2018-02-21 23:28:29 +08:00
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default 0x70 if SOC_FAMILY_NRF
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2017-10-17 11:28:15 +08:00
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help
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2019-11-01 17:24:07 +08:00
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When shifted out at the configured clock frequency,
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this must generate a pulse whose width fits within the chipset
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specifications for T1H, and whose interpulse timing meets low
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times. It is recommended that the first and last bits in the
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frame be zero; this "encourages" SPI IPs to leave MOSI low
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between frames.
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2017-10-17 11:28:15 +08:00
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config WS2812_STRIP_ZERO_FRAME
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hex "SPI frame to shift out to signal a zero bit"
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2018-02-21 23:12:10 +08:00
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default 0x60 if SOC_SERIES_STM32F4X
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2018-02-21 23:28:29 +08:00
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default 0x40 if SOC_FAMILY_NRF
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2017-10-17 11:28:15 +08:00
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help
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2019-11-01 17:24:07 +08:00
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When shifted out at the configured clock frequency,
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this must generate a pulse whose width fits within the chipset
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specifications for T0H, and whose interpulse timing meets low
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times. It is recommended that the first and last bits in the
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frame be zero; this "encourages" SPI IPs to leave MOSI low
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between frames.
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2017-10-17 11:28:15 +08:00
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# By default, we use GRBW [sic] (and ignore W).
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comment "The following options determine channel data order on the wire."
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config WS2812_RED_ORDER
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int "Order in which a red pixel should be shifted out"
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default 1
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range 0 3
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help
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2019-11-01 17:24:07 +08:00
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If the red channel is shifted out first, specify 0.
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If second, specify 1, and so on.
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2017-10-17 11:28:15 +08:00
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config WS2812_GRN_ORDER
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int "Order in which a green pixel should be shifted out"
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default 0
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range 0 3
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help
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2019-11-01 17:24:07 +08:00
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If the green channel is shifted out first, specify 0.
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If second, specify 1, and so on.
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2017-10-17 11:28:15 +08:00
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config WS2812_BLU_ORDER
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int "Order in which a blue pixel should be shifted out"
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default 2
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range 0 3
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help
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2019-11-01 17:24:07 +08:00
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If the blue channel is shifted out first, specify 0.
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If second, specify 1, and so on.
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2017-10-17 11:28:15 +08:00
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config WS2812_HAS_WHITE_CHANNEL
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bool "Does the chip have a white channel on wire?"
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default y
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help
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2019-11-01 17:24:07 +08:00
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If the chipset has a white channel, say y. White channels
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are not used by the driver, but must be declared if expected
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by the chip.
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2017-10-17 11:28:15 +08:00
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config WS2812_WHT_ORDER
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int "Order in which a white pixel should be shifted out"
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default 3
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range 0 3
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depends on WS2812_HAS_WHITE_CHANNEL
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help
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2019-11-01 17:24:07 +08:00
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If the blue channel is shifted out first, specify 0.
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If second, specify 1, and so on.
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2017-10-17 11:28:15 +08:00
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endif # WS2812_STRIP
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