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zephyr/include/drivers/clock_control/stm32_clock_control.h

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clock_control/stm32f10x: introduce driver for STM32F10x RCC The patch adds a driver for STM32F10x series RCC (Reset and Clock Control) subsystem. The module is primarily responsible for setting up of MCU's clock tree. In particular the driver sets up SYSCLK, PLL (with source configuration), AHB prescaler, and APB1/APB2 prescalers. As part of this functionality, the subsystem can enable/disable clock signal for particular peripherals, thus reducing the power consumption of the MCU. The driver implements clock control driver API. However, subsystem IDs being HW specific are exposed in driver public header that must be included by callers. The driver registers a single device using a common name STM32_CLOCK_CONTROL_NAME. The device is initialized at the PRIMARY level with priority 1. This allows the initialization to take place right after SoC initialization routine. The driver depends on selection of SOC_STM32F1X config option and is MCU specific. Change-Id: I8bea5db20726a24bce7b7ffe0b95de543240429a Origin: Original Signed-off-by: Maciej Borzecki <maciek.borzecki@gmail.com>
2016-03-03 22:33:04 +08:00
/*
* Copyright (c) 2016 Open-RnD Sp. z o.o.
stm32l4: add clock control driver Add the clock driver for the STM32L4 series. Change-Id: Icdf79061f163d8d00187b382d1564422fb875c5b Signed-off-by: Fabien Parent <fparent@baylibre.com> Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
2016-10-03 21:46:48 +08:00
* Copyright (c) 2016 BayLibre, SAS
clock/stm32: add STM32F3X reset and clock control Change-Id: Ie5f3ffec0b3aaf15f9d9f8063d2bab6be5aebb6e Signed-off-by: Adam Podogrocki <adam.podogrocki@rndity.com>
2016-11-24 21:30:19 +08:00
* Copyright (c) 2016 RnDity Sp. z o.o.
clock control:stm32: provide STM32Cube LL based driver This new clock control driver aims at providing a lightweight generic driver to the whole stm32 family. Driver is based on LL Cube API and hence is for now available only for STM32 supporting this API: stm32f3xx and stm32l4xx. Other families should be supported soon. Once globally supported, this unique driver will also help reducing the impact of stm32 clock control heterogeneity in other drivers. Change-Id: Id15a8d0d44f03809b2907ef10d6877700459e674 Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
2017-01-24 00:45:42 +08:00
* Copyright (c) 2017 Linaro Limited.
clock_control/stm32f10x: introduce driver for STM32F10x RCC The patch adds a driver for STM32F10x series RCC (Reset and Clock Control) subsystem. The module is primarily responsible for setting up of MCU's clock tree. In particular the driver sets up SYSCLK, PLL (with source configuration), AHB prescaler, and APB1/APB2 prescalers. As part of this functionality, the subsystem can enable/disable clock signal for particular peripherals, thus reducing the power consumption of the MCU. The driver implements clock control driver API. However, subsystem IDs being HW specific are exposed in driver public header that must be included by callers. The driver registers a single device using a common name STM32_CLOCK_CONTROL_NAME. The device is initialized at the PRIMARY level with priority 1. This allows the initialization to take place right after SoC initialization routine. The driver depends on selection of SOC_STM32F1X config option and is MCU specific. Change-Id: I8bea5db20726a24bce7b7ffe0b95de543240429a Origin: Original Signed-off-by: Maciej Borzecki <maciek.borzecki@gmail.com>
2016-03-03 22:33:04 +08:00
*
license: Replace Apache boilerplate with SPDX tag Replace the existing Apache 2.0 boilerplate header with an SPDX tag throughout the zephyr code tree. This patch was generated via a script run over the master branch. Also updated doc/porting/application.rst that had a dependency on line numbers in a literal include. Manually updated subsys/logging/sys_log.c that had a malformed header in the original file. Also cleanup several cases that already had a SPDX tag and we either got a duplicate or missed updating. Jira: ZEP-1457 Change-Id: I6131a1d4ee0e58f5b938300c2d2fc77d2e69572c Signed-off-by: David B. Kinder <david.b.kinder@intel.com> Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
2017-01-19 09:01:01 +08:00
* SPDX-License-Identifier: Apache-2.0
clock_control/stm32f10x: introduce driver for STM32F10x RCC The patch adds a driver for STM32F10x series RCC (Reset and Clock Control) subsystem. The module is primarily responsible for setting up of MCU's clock tree. In particular the driver sets up SYSCLK, PLL (with source configuration), AHB prescaler, and APB1/APB2 prescalers. As part of this functionality, the subsystem can enable/disable clock signal for particular peripherals, thus reducing the power consumption of the MCU. The driver implements clock control driver API. However, subsystem IDs being HW specific are exposed in driver public header that must be included by callers. The driver registers a single device using a common name STM32_CLOCK_CONTROL_NAME. The device is initialized at the PRIMARY level with priority 1. This allows the initialization to take place right after SoC initialization routine. The driver depends on selection of SOC_STM32F1X config option and is MCU specific. Change-Id: I8bea5db20726a24bce7b7ffe0b95de543240429a Origin: Original Signed-off-by: Maciej Borzecki <maciek.borzecki@gmail.com>
2016-03-03 22:33:04 +08:00
*/
#ifndef _STM32_CLOCK_CONTROL_H_
#define _STM32_CLOCK_CONTROL_H_
#include <clock_control.h>
/* common clock control device name for all STM32 chips */
#define STM32_CLOCK_CONTROL_NAME "stm32-cc"
stm32: rename SOC_STM32F1X -> SOC_SERIES_STM32F1X Use SOC_SERIES_* for naming SoCs with similar features and architectures with the goal of code reuse. The Series in the config variable should avoid name collisions and clearly denote the relationships within an SoC family. Change-Id: I7a98542f96b5d5dc3acc23782c4d45f98cceb599 Signed-off-by: Anas Nashif <anas.nashif@intel.com>
2016-04-03 10:40:26 +08:00
#ifdef CONFIG_SOC_SERIES_STM32F1X
clock_control/stm32f10x: introduce driver for STM32F10x RCC The patch adds a driver for STM32F10x series RCC (Reset and Clock Control) subsystem. The module is primarily responsible for setting up of MCU's clock tree. In particular the driver sets up SYSCLK, PLL (with source configuration), AHB prescaler, and APB1/APB2 prescalers. As part of this functionality, the subsystem can enable/disable clock signal for particular peripherals, thus reducing the power consumption of the MCU. The driver implements clock control driver API. However, subsystem IDs being HW specific are exposed in driver public header that must be included by callers. The driver registers a single device using a common name STM32_CLOCK_CONTROL_NAME. The device is initialized at the PRIMARY level with priority 1. This allows the initialization to take place right after SoC initialization routine. The driver depends on selection of SOC_STM32F1X config option and is MCU specific. Change-Id: I8bea5db20726a24bce7b7ffe0b95de543240429a Origin: Original Signed-off-by: Maciej Borzecki <maciek.borzecki@gmail.com>
2016-03-03 22:33:04 +08:00
#include "stm32f1_clock_control.h"
clock_control: stm32f4x: introduce driver for STM32F4x RCC Based on the STM32F10x driver. Removing old code as we need to use the bus number when dealing with 4 possible peripherals. Change-Id: Id0263aa008e9b039ff9a00339e5622e289ffdf99 Signed-off-by: Ricardo Salveti <ricardo.salveti@linaro.org> Signed-off-by: Amit Kucheria <amit.kucheria@linaro.org> Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
2016-10-27 02:26:23 +08:00
#elif CONFIG_SOC_SERIES_STM32F4X
#include "stm32f4_clock_control.h"
stm32l4: add clock control driver Add the clock driver for the STM32L4 series. Change-Id: Icdf79061f163d8d00187b382d1564422fb875c5b Signed-off-by: Fabien Parent <fparent@baylibre.com> Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
2016-10-03 21:46:48 +08:00
#endif
clock control:stm32: provide STM32Cube LL based driver This new clock control driver aims at providing a lightweight generic driver to the whole stm32 family. Driver is based on LL Cube API and hence is for now available only for STM32 supporting this API: stm32f3xx and stm32l4xx. Other families should be supported soon. Once globally supported, this unique driver will also help reducing the impact of stm32 clock control heterogeneity in other drivers. Change-Id: Id15a8d0d44f03809b2907ef10d6877700459e674 Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
2017-01-24 00:45:42 +08:00
/* Bus */
enum {
STM32_CLOCK_BUS_AHB1,
STM32_CLOCK_BUS_AHB2,
STM32_CLOCK_BUS_APB1,
#ifdef CONFIG_SOC_SERIES_STM32L4X
STM32_CLOCK_BUS_APB1_2,
#endif
STM32_CLOCK_BUS_APB2,
};
struct stm32_pclken {
uint32_t bus;
uint32_t enr;
};
clock_control/stm32f10x: introduce driver for STM32F10x RCC The patch adds a driver for STM32F10x series RCC (Reset and Clock Control) subsystem. The module is primarily responsible for setting up of MCU's clock tree. In particular the driver sets up SYSCLK, PLL (with source configuration), AHB prescaler, and APB1/APB2 prescalers. As part of this functionality, the subsystem can enable/disable clock signal for particular peripherals, thus reducing the power consumption of the MCU. The driver implements clock control driver API. However, subsystem IDs being HW specific are exposed in driver public header that must be included by callers. The driver registers a single device using a common name STM32_CLOCK_CONTROL_NAME. The device is initialized at the PRIMARY level with priority 1. This allows the initialization to take place right after SoC initialization routine. The driver depends on selection of SOC_STM32F1X config option and is MCU specific. Change-Id: I8bea5db20726a24bce7b7ffe0b95de543240429a Origin: Original Signed-off-by: Maciej Borzecki <maciek.borzecki@gmail.com>
2016-03-03 22:33:04 +08:00
#endif /* _STM32_CLOCK_CONTROL_H_ */