2022-02-04 16:55:47 +08:00
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/*
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* Copyright (c) 2022 Intel Corporation
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*
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* SPDX-License-Identifier: Apache-2.0
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*/
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#include <cpuid.h> /* Header provided by the toolchain. */
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#include <kernel_structs.h>
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#include <arch/x86/cpuid.h>
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#include <kernel.h>
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uint32_t z_x86_cpuid_extended_features(void)
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{
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uint32_t eax, ebx, ecx = 0U, edx;
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if (__get_cpuid(CPUID_EXTENDED_FEATURES_LVL,
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&eax, &ebx, &ecx, &edx) == 0) {
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return 0;
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}
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return edx;
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}
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2022-02-04 17:14:08 +08:00
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#define INITIAL_APIC_ID_SHIFT (24)
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#define INITIAL_APIC_ID_MASK (0xFF)
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uint8_t z_x86_cpuid_get_current_physical_apic_id(void)
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{
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uint32_t eax, ebx, ecx, edx;
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if (IS_ENABLED(CONFIG_X2APIC)) {
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/* leaf 0x1F should be used first prior to using 0x0B */
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if (__get_cpuid(CPUID_EXTENDED_TOPOLOGY_ENUMERATION_V2,
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&eax, &ebx, &ecx, &edx) == 0) {
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if (__get_cpuid(CPUID_EXTENDED_TOPOLOGY_ENUMERATION,
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&eax, &ebx, &ecx, &edx) == 0) {
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return 0;
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}
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}
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} else {
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if (__get_cpuid(CPUID_BASIC_INFO_1,
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&eax, &ebx, &ecx, &edx) == 0) {
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return 0;
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}
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edx = (ebx >> INITIAL_APIC_ID_SHIFT);
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}
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return (uint8_t)(edx & INITIAL_APIC_ID_MASK);
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}
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