zephyr/soc/arm/ti_lm3s6965/Kconfig.soc

# SPDX-License-Identifier: Apache-2.0

config SOC_TI_LM3S6965
	bool "TI LM3S6965"
	select CPU_CORTEX_M3
	select CPU_CORTEX_M_HAS_DWT
license: cleanup: add SPDX Apache-2.0 license identifier Update the files which contain no license information with the 'Apache-2.0' SPDX license identifier. Many source files in the tree are missing licensing information, which makes it harder for compliance tools to determine the correct license. By default all files without license information are under the default license of Zephyr, which is Apache version 2. Signed-off-by: Anas Nashif <anas.nashif@intel.com> 2019-04-06 21:08:09 +08:00			`# SPDX-License-Identifier: Apache-2.0`

Use SoC instead of platform. Change terminology and use SoC instead of platform. An SoC provides features and default configurations available with an SoC. A board implements the SoC and adds more features and IP block specific to the board to extend the SoC functionality such as sensors and debugging features. Change-Id: I15e8d78a6d4ecd5cfb3bc25ced9ba77e5ea1122f Signed-off-by: Anas Nashif <anas.nashif@intel.com> 2015-12-17 21:54:35 +08:00			`config SOC_TI_LM3S6965`
Add TI platform as LM3S6965 instead of Qemu Previous it was renamed in favor of Qemu, now that we have board support we move this to the original name and derive a qemu board out of the platform. Change-Id: Ia8769b27defa0a39503ecf2e6ec7fc6304b6ff49 Signed-off-by: Anas Nashif <anas.nashif@intel.com> 2015-12-14 08:36:02 +08:00			`bool "TI LM3S6965"`
			`select CPU_CORTEX_M3`
soc: arm: ti_lm3s6965: Select CPU DWT feature symbol The Data Watchpoint and Trace (DWT) is an optional debug unit for the Cortex-M family cores (except ARMv6-M; i.e. M0 and M0+) that provides watchpoints, data tracing and system profiling capabilities. Signed-off-by: Stephanos Ioannidis <root@stephanos.io> 2020-01-10 09:51:32 +08:00			`select CPU_CORTEX_M_HAS_DWT`