2024-02-01 03:24:46 +08:00
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/*
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* Copyright (c) 2024 Espressif Systems (Shanghai) Co., Ltd.
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* SPDX-License-Identifier: Apache-2.0
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*/
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#pragma once
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/* SRAM0 (32k) with adjacted SRAM1 (288k)
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* Ibus and Dbus address space
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*/
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#define SRAM_IRAM_START 0x40020000
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#define SRAM_DRAM_START 0x3ffb0000
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#define SRAM_CACHE_SIZE (CONFIG_ESP32S2_INSTRUCTION_CACHE_SIZE \
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+ CONFIG_ESP32S2_DATA_CACHE_SIZE)
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/** Simplified memory map for the bootloader.
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* Make sure the bootloader can load into main memory without overwriting itself.
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*
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* ESP32-S2 ROM static data usage is as follows:
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* - 0x3ffeab00 - 0x3fffc410: Shared buffers, used in UART/USB/SPI download mode only
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* - 0x3fffc410 - 0x3fffe710: CPU stack, can be reclaimed as heap after RTOS startup
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* - 0x3fffe710 - 0x40000000: ROM .bss and .data (not easily reclaimable)
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*
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* The 2nd stage bootloader can take space up to the end of ROM shared
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* buffers area (0x3fffc410). For alignment purpose we shall use value (0x3fce9700).
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*/
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/* The offset between Dbus and Ibus.
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* Used to convert between 0x4002xxxx and 0x3ffbxxxx addresses.
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*/
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#define IRAM_DRAM_OFFSET 0x70000
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#define DRAM_BUFFERS_START 0x3ffeab00
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2024-05-31 03:39:35 +08:00
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#define DRAM_RESERVED_START 0x3ffec000
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2024-02-01 03:24:46 +08:00
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#define DRAM_STACK_START 0x3fffc410
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#define DRAM_ROM_BSS_DATA_START 0x3fffe710
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2024-05-31 03:39:35 +08:00
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/* For safety margin between bootloader data section and startup stacks */
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#define BOOTLOADER_STACK_OVERHEAD 0x0
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#define BOOTLOADER_DRAM_SEG_LEN 0x7000
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#define BOOTLOADER_IRAM_LOADER_SEG_LEN 0x3000
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#define BOOTLOADER_IRAM_SEG_LEN 0xa000
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2024-02-01 03:24:46 +08:00
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/* Base address used for calculating memory layout
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* counted from Dbus backwards and back to the Ibus
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*/
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2024-05-31 03:39:35 +08:00
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#define BOOTLOADER_USER_DRAM_END (DRAM_RESERVED_START - BOOTLOADER_STACK_OVERHEAD)
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2024-02-01 03:24:46 +08:00
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/* Start of the lower region is determined by region size and the end of the higher region */
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2024-05-31 03:39:35 +08:00
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#define BOOTLOADER_IRAM_LOADER_SEG_START (BOOTLOADER_USER_DRAM_END + IRAM_DRAM_OFFSET \
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- BOOTLOADER_IRAM_LOADER_SEG_LEN)
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#define BOOTLOADER_DRAM_SEG_START (BOOTLOADER_IRAM_LOADER_SEG_START - BOOTLOADER_DRAM_SEG_LEN \
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- IRAM_DRAM_OFFSET)
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#define BOOTLOADER_IRAM_SEG_START (BOOTLOADER_DRAM_SEG_START - BOOTLOADER_IRAM_SEG_LEN \
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+ IRAM_DRAM_OFFSET)
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2024-02-01 03:24:46 +08:00
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/* Flash */
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#ifdef CONFIG_FLASH_SIZE
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#define FLASH_SIZE CONFIG_FLASH_SIZE
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#else
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#define FLASH_SIZE 0x400000
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#endif
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/* Cached memories */
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#define CACHE_ALIGN CONFIG_MMU_PAGE_SIZE
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#define IROM_SEG_ORG 0x40080000
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#define IROM_SEG_LEN 0x780000
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#define DROM_SEG_ORG 0x3f000000
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#define DROM_SEG_LEN FLASH_SIZE
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