2018-04-05 04:11:07 +08:00
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/*
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* Copyright (c) 2017 Jean-Paul Etienne <fractalclone@gmail.com>
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*
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* SPDX-License-Identifier: Apache-2.0
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*/
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#include <init.h>
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#include <pinmux.h>
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2018-11-01 09:19:38 +08:00
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#include <soc.h>
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2018-04-05 04:11:07 +08:00
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static int hifive1_pinmux_init(struct device *dev)
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{
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ARG_UNUSED(dev);
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2018-08-16 06:41:21 +08:00
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struct device *p = device_get_binding(CONFIG_PINMUX_SIFIVE_0_NAME);
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2018-04-05 04:11:07 +08:00
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/* UART0 RX */
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2018-08-16 06:41:21 +08:00
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pinmux_pin_set(p, 16, SIFIVE_PINMUX_IOF0);
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2018-04-05 04:11:07 +08:00
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/* UART0 TX */
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2018-08-16 06:41:21 +08:00
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pinmux_pin_set(p, 17, SIFIVE_PINMUX_IOF0);
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2018-04-05 04:11:07 +08:00
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/* SPI1 */
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2018-11-22 03:43:48 +08:00
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pinmux_pin_set(p, 2, SIFIVE_PINMUX_IOF0); /* CS0 */
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pinmux_pin_set(p, 3, SIFIVE_PINMUX_IOF0); /* MOSI */
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pinmux_pin_set(p, 4, SIFIVE_PINMUX_IOF0); /* MISO */
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pinmux_pin_set(p, 5, SIFIVE_PINMUX_IOF0); /* SCK */
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pinmux_pin_set(p, 9, SIFIVE_PINMUX_IOF0); /* CS2 */
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pinmux_pin_set(p, 10, SIFIVE_PINMUX_IOF0); /* CS3 */
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2018-04-05 04:11:07 +08:00
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2018-11-22 06:21:28 +08:00
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#if defined(CONFIG_PWM)
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/* PWM 0 is not enabled because it conflicts with SPI 1 */
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/* PWM 1 */
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/* PWM1_0 is not enabled because the driver cannot use it */
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pinmux_pin_set(p, 19, SIFIVE_PINMUX_IOF1); /* PWM1_1 */
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pinmux_pin_set(p, 21, SIFIVE_PINMUX_IOF1); /* PWM1_2 */
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pinmux_pin_set(p, 22, SIFIVE_PINMUX_IOF1); /* PWM1_3 */
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/* PWM 2 */
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/* PWM2_0 is not enabled because the driver cannot use it */
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pinmux_pin_set(p, 11, SIFIVE_PINMUX_IOF1); /* PWM2_1 */
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pinmux_pin_set(p, 12, SIFIVE_PINMUX_IOF1); /* PWM2_2 */
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pinmux_pin_set(p, 13, SIFIVE_PINMUX_IOF1); /* PWM2_3 */
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#endif /* CONFIG_PWM */
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2018-04-05 04:11:07 +08:00
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return 0;
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}
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SYS_INIT(hifive1_pinmux_init, PRE_KERNEL_1, CONFIG_PINMUX_INIT_PRIORITY);
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