2022-02-16 04:18:50 +08:00
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/*
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* Copyright (c) 2022 Carlo Caione <ccaione@baylibre.com>
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*
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* SPDX-License-Identifier: Apache-2.0
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*/
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/**
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* @file
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* @brief Linker command/script file
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*
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* Linker script for the Cortex-M platforms.
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*/
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2022-05-09 19:20:58 +08:00
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#include <zephyr/linker/sections.h>
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#include <zephyr/devicetree.h>
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2022-02-16 04:18:50 +08:00
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2022-05-09 19:20:58 +08:00
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#include <zephyr/linker/linker-defs.h>
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#include <zephyr/linker/linker-tool.h>
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2022-02-16 04:18:50 +08:00
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2023-09-13 18:39:02 +08:00
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#if defined(CONFIG_NORDIC_QSPI_NOR) && defined(CONFIG_SOC_NRF5340_CPUAPP)
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2022-02-17 20:04:00 +08:00
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2023-09-13 18:39:02 +08:00
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/* On nRF5340, external flash is mapped in XIP region at 0x1000_0000. */
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#define EXTFLASH_NODE DT_INST(0, nordic_qspi_nor)
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#define EXTFLASH_ADDR 0x10000000
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#define EXTFLASH_SIZE DT_PROP_OR(EXTFLASH_NODE, size_in_bytes, \
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DT_PROP(EXTFLASH_NODE, size) / 8)
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2022-02-17 20:04:00 +08:00
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#else
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2022-02-16 04:18:50 +08:00
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/*
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* Add another fake portion of FLASH to simulate a secondary or external FLASH
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* that we can do XIP from.
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*/
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2023-09-28 01:25:50 +08:00
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#define EXTFLASH_ADDR 0x7000
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2022-02-16 04:18:50 +08:00
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#define EXTFLASH_SIZE (CONFIG_FLASH_SIZE * 1K - EXTFLASH_ADDR)
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2023-09-13 18:39:02 +08:00
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#endif
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2022-02-16 04:18:50 +08:00
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MEMORY
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{
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2023-09-13 18:39:02 +08:00
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EXTFLASH (rx) : ORIGIN = EXTFLASH_ADDR, LENGTH = EXTFLASH_SIZE
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2022-02-16 04:18:50 +08:00
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}
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2023-07-04 16:01:39 +08:00
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#include <zephyr/arch/arm/cortex_m/scripts/linker.ld>
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