2017-02-05 13:29:41 +08:00
|
|
|
/* This file is a temporary workaround for mapping of the generated information
|
|
|
|
* to the current driver definitions. This will be removed when the drivers
|
|
|
|
* are modified to handle the generated information, or the mapping of
|
|
|
|
* generated data matches the driver definitions.
|
|
|
|
*/
|
|
|
|
|
2017-04-04 04:53:04 +08:00
|
|
|
#define CONFIG_NUM_IRQ_PRIO_BITS ARM_V7M_NVIC_E000E100_ARM_NUM_IRQ_PRIORITY_BITS
|
2017-02-06 13:38:16 +08:00
|
|
|
|
|
|
|
#define CONFIG_UART_STM32_PORT_1_BASE_ADDRESS ST_STM32_USART_40013800_BASE_ADDRESS
|
2017-04-20 23:10:10 +08:00
|
|
|
#define CONFIG_UART_STM32_PORT_1_BAUD_RATE ST_STM32_USART_40013800_CURRENT_SPEED
|
2017-03-24 02:41:32 +08:00
|
|
|
#define CONFIG_UART_STM32_PORT_1_IRQ_PRI ST_STM32_USART_40013800_IRQ_0_PRIORITY
|
2017-05-17 04:50:20 +08:00
|
|
|
#define CONFIG_UART_STM32_PORT_1_NAME ST_STM32_USART_40013800_LABEL
|
2017-02-06 13:38:16 +08:00
|
|
|
#define PORT_1_IRQ ST_STM32_USART_40013800_IRQ_0
|
|
|
|
|
|
|
|
#define CONFIG_UART_STM32_PORT_2_BASE_ADDRESS ST_STM32_USART_40004400_BASE_ADDRESS
|
2017-04-20 23:10:10 +08:00
|
|
|
#define CONFIG_UART_STM32_PORT_2_BAUD_RATE ST_STM32_USART_40004400_CURRENT_SPEED
|
2017-03-24 02:41:32 +08:00
|
|
|
#define CONFIG_UART_STM32_PORT_2_IRQ_PRI ST_STM32_USART_40004400_IRQ_0_PRIORITY
|
2017-05-17 04:50:20 +08:00
|
|
|
#define CONFIG_UART_STM32_PORT_2_NAME ST_STM32_USART_40004400_LABEL
|
2017-02-06 13:38:16 +08:00
|
|
|
#define PORT_2_IRQ ST_STM32_USART_40004400_IRQ_0
|
|
|
|
|
|
|
|
#define CONFIG_UART_STM32_PORT_3_BASE_ADDRESS ST_STM32_USART_40004800_BASE_ADDRESS
|
2017-04-20 23:10:10 +08:00
|
|
|
#define CONFIG_UART_STM32_PORT_3_BAUD_RATE ST_STM32_USART_40004800_CURRENT_SPEED
|
2017-03-24 02:41:32 +08:00
|
|
|
#define CONFIG_UART_STM32_PORT_3_IRQ_PRI ST_STM32_USART_40004800_IRQ_0_PRIORITY
|
2017-05-17 04:50:20 +08:00
|
|
|
#define CONFIG_UART_STM32_PORT_3_NAME ST_STM32_USART_40004800_LABEL
|
2017-02-06 13:38:16 +08:00
|
|
|
#define PORT_3_IRQ ST_STM32_USART_40004800_IRQ_0
|
|
|
|
|
|
|
|
#define CONFIG_UART_STM32_PORT_4_BASE_ADDRESS ST_STM32_USART_40004C00_BASE_ADDRESS
|
2017-04-20 23:10:10 +08:00
|
|
|
#define CONFIG_UART_STM32_PORT_4_BAUD_RATE ST_STM32_USART_40004C00_CURRENT_SPEED
|
2017-03-24 02:41:32 +08:00
|
|
|
#define CONFIG_UART_STM32_PORT_4_IRQ_PRI ST_STM32_USART_40004C00_IRQ_0_PRIORITY
|
2017-05-17 04:50:20 +08:00
|
|
|
#define CONFIG_UART_STM32_PORT_4_NAME ST_STM32_USART_40004C00_LABEL
|
2017-02-06 13:38:16 +08:00
|
|
|
#define PORT_4_IRQ ST_STM32_USART_40004C00_IRQ_0
|
|
|
|
|
|
|
|
#define CONFIG_UART_STM32_PORT_5_BASE_ADDRESS ST_STM32_USART_40005000_BASE_ADDRESS
|
2017-04-20 23:10:10 +08:00
|
|
|
#define CONFIG_UART_STM32_PORT_5_BAUD_RATE ST_STM32_USART_40005000_CURRENT_SPEED
|
2017-03-24 02:41:32 +08:00
|
|
|
#define CONFIG_UART_STM32_PORT_5_IRQ_PRI ST_STM32_USART_40005000_IRQ_0_PRIORITY
|
2017-05-17 04:50:20 +08:00
|
|
|
#define CONFIG_UART_STM32_PORT_5_NAME ST_STM32_USART_40005000_LABEL
|
2017-02-06 13:38:16 +08:00
|
|
|
#define PORT_5_IRQ ST_STM32_USART_40005000_IRQ_0
|