2017-06-16 23:42:03 +08:00
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/*
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* SPDX-License-Identifier: Apache-2.0
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*
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* Device Tree include file for CC2650 SoC from Texas Instruments.
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*/
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#include "armv7-m.dtsi"
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/ {
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2017-07-16 02:57:32 +08:00
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cpus {
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#address-cells = <1>;
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#size-cells = <0>;
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2017-06-16 23:42:03 +08:00
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2017-07-16 02:57:32 +08:00
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cpu@0 {
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device_type = "cpu";
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compatible = "arm,cortex-m3";
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reg = <0>;
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2017-06-16 23:42:03 +08:00
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};
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2017-07-16 02:57:32 +08:00
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};
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2017-06-16 23:42:03 +08:00
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2017-07-21 20:43:01 +08:00
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sram0: memory@20000000 {
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2017-07-20 20:59:29 +08:00
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compatible = "mmio-sram";
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2017-07-16 02:57:32 +08:00
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reg = <0x20000000 0x5000>;
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};
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2017-07-21 20:43:01 +08:00
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flash0: serial-flash@0 {
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2017-07-16 02:57:32 +08:00
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compatible = "serial-flash";
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reg = <0x0 0x20000>;
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};
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2017-06-16 23:42:03 +08:00
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2019-06-21 20:49:23 +08:00
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sysclk: system-clock {
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compatible = "fixed-clock";
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clock-frequency = <48000000>;
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#clock-cells = <0>;
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};
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2017-07-16 02:57:32 +08:00
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soc {
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2017-06-16 23:42:03 +08:00
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gpioa: gpio@40022000 {
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compatible = "ti,cc2650-gpio";
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reg = <0x40022000 0xE4>;
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interrupts = <0 0>;
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status = "disabled";
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gpio-controller;
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#gpio-cells = <1>;
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};
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pinmux_a: pinmux@40081000 {
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compatible = "ti,cc2650-pinmux";
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reg = <0x40081000 0x80>;
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};
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prcm0: prcm@40082000 {
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compatible = "ti,cc2650-prcm";
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reg = <0x40082000 0x228>;
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};
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trng0: trng@40028000 {
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compatible = "ti,cc2650-trng";
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reg = <0x40028000 0x1FFC>;
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interrupts = <33 0>;
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status = "disabled";
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};
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uart0: uart@40001000 {
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compatible = "ti,stellaris-uart";
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reg = <0x40001000 0x4C>;
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2019-06-21 20:49:23 +08:00
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clocks = <&sysclk>;
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2017-06-16 23:42:03 +08:00
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interrupts = <5 0>, <6 0>;
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status = "disabled";
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2017-06-16 23:42:05 +08:00
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label = "UART_0";
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2017-06-16 23:42:03 +08:00
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};
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};
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};
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&nvic {
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arm,num-irq-priority-bits = <3>;
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};
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