2024-03-28 21:45:58 +08:00
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/*
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* Copyright (c) 2024 Nordic Semiconductor ASA
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*
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* SPDX-License-Identifier: Apache-2.0
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*/
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#include <nordic/nrf54l15.dtsi>
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cpu: &cpuflpr {};
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clic: &cpuflpr_clic {};
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/delete-node/ &cpuapp;
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/delete-node/ &cpuapp_rram;
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/delete-node/ &cpuapp_ppb;
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/delete-node/ &cpuapp_sram;
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/ {
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soc {
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compatible = "simple-bus";
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interrupt-parent = <&cpuflpr_clic>;
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ranges;
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};
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};
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2024-05-20 19:25:35 +08:00
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&cpuflpr {
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cpuflpr_vevif_rx: mailbox {
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compatible = "nordic,nrf-vevif-task-rx";
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status = "disabled";
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interrupt-parent = <&cpuflpr_clic>;
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2024-08-22 22:19:40 +08:00
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interrupts = <16 NRF_DEFAULT_IRQ_PRIORITY>,
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<17 NRF_DEFAULT_IRQ_PRIORITY>,
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<18 NRF_DEFAULT_IRQ_PRIORITY>,
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<19 NRF_DEFAULT_IRQ_PRIORITY>,
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<20 NRF_DEFAULT_IRQ_PRIORITY>,
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<21 NRF_DEFAULT_IRQ_PRIORITY>,
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<22 NRF_DEFAULT_IRQ_PRIORITY>;
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2024-05-20 19:25:35 +08:00
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#mbox-cells = <1>;
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nordic,tasks = <7>;
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2024-08-22 22:19:40 +08:00
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nordic,tasks-mask = <0x007f0000>;
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2024-05-20 19:25:35 +08:00
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};
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};
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&cpuflpr_vpr {
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cpuflpr_vevif_tx: mailbox {
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compatible = "nordic,nrf-vevif-event-tx";
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#mbox-cells = <1>;
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nordic,events = <1>;
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2024-08-22 22:19:40 +08:00
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nordic,events-mask = <0x00100000>;
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2024-05-20 19:25:35 +08:00
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status = "disabled";
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};
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};
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2024-04-04 17:12:02 +08:00
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&cpuflpr_clic {
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status = "okay";
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};
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2024-03-28 21:45:58 +08:00
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&grtc {
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interrupts = <226 NRF_DEFAULT_IRQ_PRIORITY>;
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};
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2024-04-19 16:17:51 +08:00
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&gpiote20 {
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interrupts = <218 NRF_DEFAULT_IRQ_PRIORITY>;
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};
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&gpiote30 {
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interrupts = <268 NRF_DEFAULT_IRQ_PRIORITY>;
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};
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