zephyr/dts/riscv/neorv32.dtsi

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/*
* Copyright (c) 2021 Henrik Brix Andersen <henrik@brixandersen.dk>
*
* SPDX-License-Identifier: Apache-2.0
*/
/dts-v1/;
#include <skeleton.dtsi>
/ {
cpus {
#address-cells = <1>;
#size-cells = <0>;
cpu0: cpu@0 {
compatible = "neorv32-cpu";
reg = <0>;
device_type = "cpu";
intc: interrupt-controller {
compatible = "riscv,cpu-intc";
interrupt-controller;
#address-cells = <1>;
#interrupt-cells = <1>;
firq: firq {
interrupt-map-mask = <0x0 0xffffffff>;
interrupt-map = <
0 0 &intc 0 16
0 1 &intc 0 17
0 2 &intc 0 18
0 3 &intc 0 19
0 4 &intc 0 20
0 5 &intc 0 21
0 6 &intc 0 22
0 7 &intc 0 23
0 8 &intc 0 24
0 9 &intc 0 25
0 10 &intc 0 26
0 11 &intc 0 27
0 12 &intc 0 28
0 13 &intc 0 29
0 14 &intc 0 30
0 15 &intc 0 31
>;
#interrupt-cells = <1>;
};
};
};
};
soc {
compatible = "simple-bus";
interrupt-parent = <&firq>;
#address-cells = <1>;
#size-cells = <1>;
ranges;
sysinfo: syscon@ffffffe0 {
compatible = "neorv-sysinfo", "syscon";
status = "okay";
reg = <0xffffffe0 32>;
label = "SYSINFO";
};
};
};