48 lines
969 B
C
48 lines
969 B
C
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/*
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* Copyright (c) 2018 Endre Karlson <endre.karlson@gmail.com>
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*
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* SPDX-License-Identifier: Apache-2.0
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*/
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/**
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* @file SoC configuration macros for the STM32L0 family processors.
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*
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* Based on reference manual:
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* STM32L0X advanced ARM ® -based 32-bit MCUs
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*
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* Chapter 2.2: Memory organization
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*/
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#ifndef _STM32L0_SOC_H_
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#define _STM32L0_SOC_H_
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#define GPIO_REG_SIZE 0x400
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/* base address for where GPIO registers start */
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#define GPIO_PORTS_BASE (GPIOA_BASE)
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#ifndef _ASMLANGUAGE
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#include <device.h>
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#include <misc/util.h>
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#include <random/rand32.h>
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#include <stm32l0xx.h>
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#include "soc_irq.h"
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#ifdef CONFIG_SERIAL_HAS_DRIVER
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#include <stm32l0xx_ll_usart.h>
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#endif
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#ifdef CONFIG_CLOCK_CONTROL_STM32_CUBE
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#include <stm32l0xx_ll_utils.h>
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#include <stm32l0xx_ll_bus.h>
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#include <stm32l0xx_ll_rcc.h>
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#include <stm32l0xx_ll_system.h>
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#endif /* CONFIG_CLOCK_CONTROL_STM32_CUBE */
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#endif /* !_ASMLANGUAGE */
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#endif /* _STM32L0_SOC_H_ */
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