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zephyr/soc/arm/microchip_mec/mec1501/Kconfig.soc

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kconfig: Clean up header comments and make them consistent Use this short header style in all Kconfig files: # <description> # <copyright> # <license> ... Also change all <description>s from # Kconfig[.extension] - Foo-related options to just # Foo-related options It's clear enough that it's about Kconfig. The <description> cleanup was done with this command, along with some manual cleanup (big letter at the start, etc.) git ls-files '*Kconfig*' | \ xargs sed -i -E '1 s/#\s*Kconfig[\w.-]*\s*-\s*/# /' Signed-off-by: Ulf Magnusson <Ulf.Magnusson@nordicsemi.no>
2019-11-01 20:45:29 +08:00
# Microchip MEC1501 MCU core series
soc : arm : microchip_mec Add Microchip MEC1501 SoC Initial support for Microchip MEC1501 series is added to the tree. Additional support for UART is also included. This SoC supports two operational modes for interrupts (Direct and Aggregated). For this commit, the direct capable interrupt are configured in direct mode. Signed-off-by: Scott Worley <scott.worley@microchip.com>
2019-04-02 06:10:44 +08:00
# Copyright (c) 2018 Intel Corporation
# SPDX-License-Identifier: Apache-2.0
choice
kconfig: Global whitespace/consistency cleanup Clean up space errors and use a consistent style throughout the Kconfig files. This makes reading the Kconfig files more distraction-free, helps with grepping, and encourages the same style getting copied around everywhere (meaning another pass hopefully won't be needed). Go for the most common style: - Indent properties with a single tab, including for choices. Properties on choices work exactly the same syntactically as properties on symbols, so not sure how the no-indentation thing happened. - Indent help texts with a tab followed by two spaces - Put a space between 'config' and the symbol name, not a tab. This also helps when grepping for definitions. - Do '# A comment' instead of '#A comment' I tweaked Kconfiglib a bit to find most of the stuff. Some help texts were reflowed to 79 columns with 'gq' in Vim as well, though not all, because I was afraid I'd accidentally mess up formatting. Signed-off-by: Ulf Magnusson <Ulf.Magnusson@nordicsemi.no>
2019-11-01 17:24:07 +08:00
prompt "MEC1501 Selection"
depends on SOC_SERIES_MEC1501X
soc : arm : microchip_mec Add Microchip MEC1501 SoC Initial support for Microchip MEC1501 series is added to the tree. Additional support for UART is also included. This SoC supports two operational modes for interrupts (Direct and Aggregated). For this commit, the direct capable interrupt are configured in direct mode. Signed-off-by: Scott Worley <scott.worley@microchip.com>
2019-04-02 06:10:44 +08:00
config SOC_MEC1501_HSZ
bool "MEC1501_HSZ"
select HAS_MEC_HAL
endchoice
soc: mchp: Add configuration option to switch timer drivers Expose in MEC1501 SoC and option to switch between OS timer drivers Signed-off-by: Jose Alberto Meza <jose.a.meza.arellano@intel.com>
2019-07-31 07:22:55 +08:00
config RTOS_TIMER
bool "MEC1501 RTOS timer"
soc : mec1501 : Deep and light sleep example Created MEC1501 deep and light sleep example for MCHP MEC1501. Modifications were made to SoC, board, timer, and hello world sample program. Power management split into SoC power implementing the interface and device power for device specific logic. Signed-off-by: Scott Worley <scott.worley@microchip.com>
2019-08-31 02:10:02 +08:00
config SOC_POWER_MANAGEMENT
bool "MEC1501 Power Management"
soc : arm : microchip_mec Add Microchip MEC1501 SoC Initial support for Microchip MEC1501 series is added to the tree. Additional support for UART is also included. This SoC supports two operational modes for interrupts (Direct and Aggregated). For this commit, the direct capable interrupt are configured in direct mode. Signed-off-by: Scott Worley <scott.worley@microchip.com>
2019-04-02 06:10:44 +08:00
config SOC_MEC1501_PROC_CLK_DIV
int "PROC_CLK_DIV"
default 1
range 1 48
help
This divisor defines a ratio between processor clock (HCLK)
and master clock (MCK):
HCLK = MCK / PROC_CLK_DIV
Allowed divider values: 1, 3, 4, 16, and 48.
config SOC_MEC1501_EXT_32K
bool "Use external 32KHz clock source"
help
Use an external 32768 Hz clock source for PLL reference
clock.
Say y if you want to use an external source for the PLL
32KHz reference clock.
Say n to use the +/-2% internal silicon oscillator.
config SOC_MEC1501_EXT_32K_CRYSTAL
bool "External 32KHz is a crystal"
depends on SOC_MEC1501_EXT_32K
help
Choose a crystal as the external 32KHz source.
Say y if you wish to use a crystal as the external
32KHz clock source.
Saying n will select the 32KHZ_IN pin as the external
32KHz clock source.
config SOC_MEC1501_EXT_32K_PARALLEL_CRYSTAL
bool "Use parallel connected 32KHz crystal"
depends on SOC_MEC1501_EXT_32K_CRYSTAL
help
Choose external 32KHz crystal connection.
Say y if the crystal is connected parallel between
the XTAL1 and XTAL pins.
Say n if the crystal is connected single ended to
the XTAL2 pin or a 32KHz square wave is on XTAL2.
boards: mchp: Add option to switch GPIO bank voltage Add KConfig board support to match board jumper settings Failing to update bank selection will affect GPIOs tied to VTR3 Signed-off-by: Jose Alberto Meza <jose.a.meza.arellano@intel.com>
2019-09-26 02:05:03 +08:00
config SOC_MEC1501_VTR3_1_8V
bool "VTR3 power rail is tied to 1.8V"
help
Set this is if VTR3 power sourcejumper in the board is changed.
soc: arm: mchp: Allow to configure HW-controlled pins as GPIOs. Introduce switch to allow board configuration for VCI pins to remain HW-controled depending on the design. Currently pins are always configured as GPIOs which is not always desirable. Signed-off-by: Jose Alberto Meza <jose.a.meza.arellano@intel.com>
2020-06-03 03:22:27 +08:00
config SOC_MEC1501_VCI_PINS_AS_GPIOS
bool "Use VCI block pins as GPIOS"
default y
help
By default these pins are not GPIOs, but HW controlled.
Set this if VCI pin block HW logic is not required in the board
design.