zephyr/soc/arm/infineon_xmc/4xxx/CMakeLists.txt

# SPDX-License-Identifier: Apache-2.0
#
# Copyright (c) 2020 Linumiz
# Author: Parthiban Nallathambi <parthiban@linumiz.com>

zephyr_sources(soc.c)
zephyr_linker_sources(NOINIT noinit.ld)
soc: arm: add infineon_xmc series support Add infineon xmc series with XMC4500 support. XMC series comes with, - CPU operates upto 120MHz - 3 RAM (PSRAM1 - code, DSRAM1 - data and DSRAM2 - communiation) - upto 1MB flash init: clock control & gpio is not done, so SoC initialization directly relies on HAL. Core operating clock is stored in no_init section, which is kept under DSRAM1. Only DSRAM1 is used until clock support. Using PSRAM1 and DSRAM1 needs adaptation in linker script - planned for next revision. Note: SystemInit cannot be consumed directly due to vector table + HAL linker dependency. Signed-off-by: Parthiban Nallathambi <parthiban@linumiz.com> 2020-04-21 17:37:42 +08:00			`# SPDX-License-Identifier: Apache-2.0`
			`#`
			`# Copyright (c) 2020 Linumiz`
			`# Author: Parthiban Nallathambi <parthiban@linumiz.com>`

			`zephyr_sources(soc.c)`
			`zephyr_linker_sources(NOINIT noinit.ld)`