2018-03-06 00:45:09 +08:00
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/*
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* Copyright (c) 2018 Philémon Jaermann
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*
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* SPDX-License-Identifier: Apache-2.0
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*/
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2018-09-27 21:23:16 +08:00
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#include <st/f4/stm32f401.dtsi>
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2018-03-06 00:45:09 +08:00
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2018-06-19 14:22:20 +08:00
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/ {
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soc {
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2019-03-15 16:09:02 +08:00
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uart4: serial@40004c00 {
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compatible ="st,stm32-uart";
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reg = <0x40004c00 0x400>;
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clocks = <&rcc STM32_CLOCK_BUS_APB1 0x00080000>;
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interrupts = <52 0>;
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status = "disabled";
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label = "UART_4";
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};
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2018-06-19 14:22:20 +08:00
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usbotg_fs: usb@50000000 {
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num-bidir-endpoints = <6>;
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};
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2018-07-07 22:34:35 +08:00
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usbotg_hs: usb@40040000 {
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compatible = "st,stm32-otghs", "st,stm32-otgfs";
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reg = <0x40040000 0x40000>;
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interrupts = <77 0>, <74 0>, <75 0>;
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interrupt-names = "otghs", "ep1_out", "ep1_in";
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num-bidir-endpoints = <9>;
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ram-size = <4096>;
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2018-07-21 01:06:24 +08:00
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maximum-speed = "full-speed";
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2018-10-03 22:19:59 +08:00
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phys = <&otghs_fs_phy>;
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2018-07-07 22:34:35 +08:00
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status = "disabled";
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label= "OTGHS";
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};
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2018-06-19 14:22:20 +08:00
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};
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2018-12-14 02:38:33 +08:00
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otghs_fs_phy: otghs_fs_phy {
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compatible = "usb-nop-xceiv";
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#phy-cells = <0>;
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label = "OTGHS_FS_PHY";
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};
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2018-06-19 14:22:20 +08:00
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};
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