zephyr/soc/riscv/riscv-privilege/sifive-freedom/CMakeLists.txt

# SPDX-License-Identifier: Apache-2.0

zephyr_sources()
zephyr_sources_ifdef(CONFIG_SOC_RISCV_SIFIVE_FREEDOM fe310_clock.c)
zephyr_sources_ifdef(CONFIG_SOC_RISCV_SIFIVE_FU540 fu540_clock.c)
zephyr_sources_ifdef(CONFIG_SOC_RISCV_SIFIVE_FU740 fu740_clock.c)
license: cleanup: add SPDX Apache-2.0 license identifier Update the files which contain no license information with the 'Apache-2.0' SPDX license identifier. Many source files in the tree are missing licensing information, which makes it harder for compliance tools to determine the correct license. By default all files without license information are under the default license of Zephyr, which is Apache version 2. Signed-off-by: Anas Nashif <anas.nashif@intel.com> 2019-04-06 21:08:09 +08:00			`# SPDX-License-Identifier: Apache-2.0`

riscv32: riscv-privilege: Microsemi Mi-V support This commit adds support for Microsemi Mi-V RISC-V softcore CPU running on the M2GL025 IGLOO2 FPGA development board. signed-off-by: Karol Gugala <kgugala@antmicro.com> 2018-06-11 01:02:14 +08:00			`zephyr_sources()`
soc: riscv: add initial support for SiFive Freedom U540 This patch adds support for SiFive Freedom U540 SoC. First version is minimum only using UART, SPI and DDR memory area. Signed-off-by: Katsuhiro Suzuki <katsuhiro@katsuster.net> 2021-06-09 17:33:12 +08:00			`zephyr_sources_ifdef(CONFIG_SOC_RISCV_SIFIVE_FREEDOM fe310_clock.c)`
			`zephyr_sources_ifdef(CONFIG_SOC_RISCV_SIFIVE_FU540 fu540_clock.c)`
soc: riscv: add initial support for SiFive Freedom U740 This patch adds support for SiFive Freedom U740 SoC. First version is minimum only using UART, SPI and L2-LIM area. Signed-off-by: Katsuhiro Suzuki <katsuhiro@katsuster.net> 2021-08-22 14:54:41 +08:00			`zephyr_sources_ifdef(CONFIG_SOC_RISCV_SIFIVE_FU740 fu740_clock.c)`