2018-05-03 16:59:12 +08:00
|
|
|
/*
|
|
|
|
* Copyright (c) 2018 Alexander Wachter
|
|
|
|
*
|
|
|
|
* SPDX-License-Identifier: Apache-2.0
|
|
|
|
*/
|
|
|
|
|
2022-07-15 17:07:18 +08:00
|
|
|
#ifndef ZEPHYR_DRIVERS_CAN_STM32_H_
|
|
|
|
#define ZEPHYR_DRIVERS_CAN_STM32_H_
|
2018-05-03 16:59:12 +08:00
|
|
|
|
2022-05-06 16:25:46 +08:00
|
|
|
#include <zephyr/drivers/can.h>
|
2018-05-03 16:59:12 +08:00
|
|
|
|
2022-07-15 17:07:18 +08:00
|
|
|
#define CAN_STM32_NUM_FILTER_BANKS (14)
|
2022-07-23 14:01:10 +08:00
|
|
|
#define CAN_STM32_MAX_FILTER_ID \
|
|
|
|
(CONFIG_CAN_MAX_EXT_ID_FILTER + CONFIG_CAN_MAX_STD_ID_FILTER * 2)
|
2018-05-03 16:59:12 +08:00
|
|
|
|
2022-07-15 17:07:18 +08:00
|
|
|
#define CAN_STM32_FIRX_STD_IDE_POS (3U)
|
|
|
|
#define CAN_STM32_FIRX_STD_RTR_POS (4U)
|
|
|
|
#define CAN_STM32_FIRX_STD_ID_POS (5U)
|
2018-05-03 16:59:12 +08:00
|
|
|
|
2022-07-15 17:07:18 +08:00
|
|
|
#define CAN_STM32_FIRX_EXT_IDE_POS (2U)
|
|
|
|
#define CAN_STM32_FIRX_EXT_RTR_POS (1U)
|
|
|
|
#define CAN_STM32_FIRX_EXT_STD_ID_POS (21U)
|
|
|
|
#define CAN_STM32_FIRX_EXT_EXT_ID_POS (3U)
|
2018-05-03 16:59:12 +08:00
|
|
|
|
2022-07-15 17:07:18 +08:00
|
|
|
struct can_stm32_mailbox {
|
2018-05-03 16:59:12 +08:00
|
|
|
can_tx_callback_t tx_callback;
|
2019-02-13 17:26:17 +08:00
|
|
|
void *callback_arg;
|
2018-05-03 16:59:12 +08:00
|
|
|
};
|
|
|
|
|
|
|
|
struct can_stm32_data {
|
2018-06-20 00:26:31 +08:00
|
|
|
struct k_mutex inst_mutex;
|
2018-05-03 16:59:12 +08:00
|
|
|
struct k_sem tx_int_sem;
|
2022-07-15 17:07:18 +08:00
|
|
|
struct can_stm32_mailbox mb0;
|
|
|
|
struct can_stm32_mailbox mb1;
|
|
|
|
struct can_stm32_mailbox mb2;
|
2022-07-23 14:01:10 +08:00
|
|
|
can_rx_callback_t rx_cb_std[CONFIG_CAN_MAX_STD_ID_FILTER];
|
|
|
|
can_rx_callback_t rx_cb_ext[CONFIG_CAN_MAX_EXT_ID_FILTER];
|
|
|
|
void *cb_arg_std[CONFIG_CAN_MAX_STD_ID_FILTER];
|
|
|
|
void *cb_arg_ext[CONFIG_CAN_MAX_EXT_ID_FILTER];
|
2021-12-29 03:00:34 +08:00
|
|
|
can_state_change_callback_t state_change_cb;
|
2022-01-10 19:32:19 +08:00
|
|
|
void *state_change_cb_data;
|
2022-02-25 20:49:01 +08:00
|
|
|
enum can_state state;
|
2022-08-31 20:28:42 +08:00
|
|
|
bool started;
|
2018-05-03 16:59:12 +08:00
|
|
|
};
|
|
|
|
|
|
|
|
struct can_stm32_config {
|
|
|
|
CAN_TypeDef *can; /*!< CAN Registers*/
|
2020-01-25 23:19:26 +08:00
|
|
|
CAN_TypeDef *master_can; /*!< CAN Registers for shared filter */
|
2020-05-28 00:26:57 +08:00
|
|
|
uint32_t bus_speed;
|
2020-04-28 00:58:05 +08:00
|
|
|
uint16_t sample_point;
|
2020-05-28 00:26:57 +08:00
|
|
|
uint8_t sjw;
|
|
|
|
uint8_t prop_ts1;
|
|
|
|
uint8_t ts2;
|
2018-05-03 16:59:12 +08:00
|
|
|
struct stm32_pclken pclken;
|
|
|
|
void (*config_irq)(CAN_TypeDef *can);
|
2021-11-05 22:21:13 +08:00
|
|
|
const struct pinctrl_dev_config *pcfg;
|
2022-03-01 21:15:19 +08:00
|
|
|
const struct device *phy;
|
|
|
|
uint32_t max_bitrate;
|
2018-05-03 16:59:12 +08:00
|
|
|
};
|
|
|
|
|
2022-07-15 17:07:18 +08:00
|
|
|
#endif /* ZEPHYR_DRIVERS_CAN_STM32_H_ */
|