zephyr/dts/arm/st/f1/stm32f105Xb.dtsi

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/*
* Copyright (c) 2023 Groupe Cahors
*
* SPDX-License-Identifier: Apache-2.0
*/
#include <mem.h>
#include <st/f1/stm32f105.dtsi>
/ {
sram0: memory@20000000 {
reg = <0x20000000 DT_SIZE_K(64)>;
};
soc {
flash-controller@40022000 {
flash0: flash@8000000 {
reg = <0x08000000 DT_SIZE_K(128)>;
};
};
};
};