2022-01-08 01:34:50 +08:00
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/*
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* Copyright (c) 2022, NXP
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*
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* SPDX-License-Identifier: Apache-2.0
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*/
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#include <mem.h>
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/ {
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soc {
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2023-08-17 07:20:38 +08:00
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sram: sram@30000000 {
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ranges = <0x0 0x10000000 0x500000
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0x20000000 0x30000000 0x500000>;
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2022-01-08 01:34:50 +08:00
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};
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peripheral: peripheral@50000000 {
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ranges = <0x0 0x50000000 0x10000000>;
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};
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flexspi: spi@134000 {
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2022-11-11 23:35:37 +08:00
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reg = <0x50134000 0x1000>, <0x18000000 DT_SIZE_M(128)>;
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};
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flexspi2: spi@13C000 {
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reg = <0x5013C000 0x1000>, <0x38000000 DT_SIZE_M(128)>;
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2022-01-08 01:34:50 +08:00
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};
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};
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};
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#include "nxp_rt5xx_common.dtsi"
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