2017-01-21 00:07:37 +08:00
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/*
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* Copyright (c) 2017 Linaro Limited.
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*
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* SPDX-License-Identifier: Apache-2.0
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*/
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#ifndef _DRIVERS_TIMER_CMSDK_AHB_
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#define _DRIVERS_TIMER_CMSDK_AHB_
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#include <counter.h>
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#ifdef __cplusplus
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extern "C" {
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#endif
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struct timer_cmsdk_apb {
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/* Offset: 0x000 (R/W) control register */
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2017-04-21 23:03:20 +08:00
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volatile u32_t ctrl;
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2017-01-21 00:07:37 +08:00
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/* Offset: 0x004 (R/W) current value register */
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2017-04-21 23:03:20 +08:00
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volatile u32_t value;
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2017-01-21 00:07:37 +08:00
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/* Offset: 0x008 (R/W) reload value register */
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2017-04-21 23:03:20 +08:00
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volatile u32_t reload;
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2017-01-21 00:07:37 +08:00
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union {
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/* Offset: 0x00C (R/ ) interrupt status register */
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2017-04-21 23:03:20 +08:00
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volatile u32_t intstatus;
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2017-01-21 00:07:37 +08:00
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/* Offset: 0x00C ( /W) interruptclear register */
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2017-04-21 23:03:20 +08:00
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volatile u32_t intclear;
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2017-01-21 00:07:37 +08:00
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};
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};
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#define TIMER_CTRL_IRQ_EN (1 << 3)
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#define TIMER_CTRL_SEL_EXT_CLK (1 << 2)
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#define TIMER_CTRL_SEL_EXT_EN (1 << 1)
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#define TIMER_CTRL_EN (1 << 0)
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#define TIMER_CTRL_INT_CLEAR (1 << 0)
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#ifdef __cplusplus
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}
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#endif
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#endif /* _DRIVERS_TIMER_CMSDK_AHB_ */
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