43 lines
1.7 KiB
ArmAsm
43 lines
1.7 KiB
ArmAsm
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// memctl_default.S - Default startup value for MEMCTL register.
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// Copyright (c) 1998-2015 Cadence Design Systems, Inc.
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//
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// Permission is hereby granted, free of charge, to any person obtaining
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// a copy of this software and associated documentation files (the
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// "Software"), to deal in the Software without restriction, including
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// without limitation the rights to use, copy, modify, merge, publish,
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// distribute, sublicense, and/or sell copies of the Software, and to
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// permit persons to whom the Software is furnished to do so, subject to
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// the following conditions:
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//
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// The above copyright notice and this permission notice shall be included
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// in all copies or substantial portions of the Software.
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//
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// THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
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// EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
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// MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.
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// IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY
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// CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT,
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// TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE
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// SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
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#include <xtensa/coreasm.h>
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#include <xtensa/config/system.h>
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// This file just contains this one symbol, used by the reset code.
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// It is here rather than in reset-vector.S because we want the symbol
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// to be external, so resolution is delayed until link time.
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//
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// To define your own value to override this default, redefine the
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// symbol __memctl_default to the desired value, e.g. -
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//
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// xt-xcc test.c -g -o test -Wl,--defsym=__memctl_default=0x08080808
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//
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.global __memctl_default
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.weak __memctl_default
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.equ __memctl_default, XCHAL_CACHE_MEMCTL_DEFAULT
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