OrgZephyr/zephyr
OrgZephyr
/
zephyr
mirror of https://github.com/zephyrproject-rtos/zephyr.git
1
0
Fork 0
Code Issues Releases Wiki Activity
zephyr/drivers/clock_control/quark_se_clock_control.c

130 lines
3.8 KiB
C
Raw Normal View History

clock: add Quark SE clock control Quark SE provides various clock controllers through its SCSS block. Peripheral, external, sensor, and others. This current drivers provides only the clock gating capability, for peripheral, external and sensor. But it could support divider and more other features once defined in the generic API. Note: such clock has _nothing_ to do with a Real Time Clock (RTC). An RTC provide clock timing like a watch would do. Here the clock controller is about circuit clocking. Change-Id: I1a365ae730dfc6be7686271f7fbb693e64a6ff6f Signed-off-by: Anas Nashif <anas.nashif@intel.com> Signed-off-by: Tomasz Bursztyka <tomasz.bursztyka@linux.intel.com>
2015-11-22 10:16:01 +08:00
/* quark_se_clock_control.c - Clock controller driver for Quark SE */
/*
* Copyright (c) 2015 Intel Corporation.
*
* Licensed under the Apache License, Version 2.0 (the "License");
* you may not use this file except in compliance with the License.
* You may obtain a copy of the License at
*
* http://www.apache.org/licenses/LICENSE-2.0
*
* Unless required by applicable law or agreed to in writing, software
* distributed under the License is distributed on an "AS IS" BASIS,
* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
* See the License for the specific language governing permissions and
* limitations under the License.
*/
#include <nanokernel.h>
#include <arch/cpu.h>
#include <misc/__assert.h>
#include <board.h>
#include <device.h>
#include <init.h>
#include <sys_io.h>
#include <clock_control.h>
#include <clock_control/quark_se_clock_control.h>
sys_log: replace old debug macros at clock control driver Clock control drivers are now using new system log macros. also update the Kconfig variable to be a level rather than a bool. JIRA: ZEP-311 Change-Id: Ia64e79e4e083df580861f64c661f8dbaa8a3985d Signed-off-by: Genaro Saucedo Tejada <genaro.saucedo.tejada@intel.com>
2016-07-08 01:17:32 +08:00
#define SYS_LOG_LEVEL CONFIG_SYS_LOG_CLOCK_CONTROL_LEVEL
#include <misc/sys_log.h>
clock: add Quark SE clock control Quark SE provides various clock controllers through its SCSS block. Peripheral, external, sensor, and others. This current drivers provides only the clock gating capability, for peripheral, external and sensor. But it could support divider and more other features once defined in the generic API. Note: such clock has _nothing_ to do with a Real Time Clock (RTC). An RTC provide clock timing like a watch would do. Here the clock controller is about circuit clocking. Change-Id: I1a365ae730dfc6be7686271f7fbb693e64a6ff6f Signed-off-by: Anas Nashif <anas.nashif@intel.com> Signed-off-by: Tomasz Bursztyka <tomasz.bursztyka@linux.intel.com>
2015-11-22 10:16:01 +08:00
struct quark_se_clock_control_config {
uint32_t base_address;
};
static inline int quark_se_clock_control_on(struct device *dev,
clock_control_subsys_t sub_system)
{
clock/quark: Make config_info pointers const. Preparation for const driver configuration data. Change-Id: I0337cb574d8bac0877643b2116920d4a0c08c8f3 Signed-off-by: Marcus Shawcroft <marcus.shawcroft@arm.com>
2016-10-07 03:54:39 +08:00
const struct quark_se_clock_control_config *info = dev->config->config_info;
clock: add Quark SE clock control Quark SE provides various clock controllers through its SCSS block. Peripheral, external, sensor, and others. This current drivers provides only the clock gating capability, for peripheral, external and sensor. But it could support divider and more other features once defined in the generic API. Note: such clock has _nothing_ to do with a Real Time Clock (RTC). An RTC provide clock timing like a watch would do. Here the clock controller is about circuit clocking. Change-Id: I1a365ae730dfc6be7686271f7fbb693e64a6ff6f Signed-off-by: Anas Nashif <anas.nashif@intel.com> Signed-off-by: Tomasz Bursztyka <tomasz.bursztyka@linux.intel.com>
2015-11-22 10:16:01 +08:00
uint32_t subsys = POINTER_TO_INT(sub_system);
if (sub_system == CLOCK_CONTROL_SUBSYS_ALL) {
sys_log: replace old debug macros at clock control driver Clock control drivers are now using new system log macros. also update the Kconfig variable to be a level rather than a bool. JIRA: ZEP-311 Change-Id: Ia64e79e4e083df580861f64c661f8dbaa8a3985d Signed-off-by: Genaro Saucedo Tejada <genaro.saucedo.tejada@intel.com>
2016-07-08 01:17:32 +08:00
SYS_LOG_DBG("Enabling all clock gates on dev %p", dev);
clock: add Quark SE clock control Quark SE provides various clock controllers through its SCSS block. Peripheral, external, sensor, and others. This current drivers provides only the clock gating capability, for peripheral, external and sensor. But it could support divider and more other features once defined in the generic API. Note: such clock has _nothing_ to do with a Real Time Clock (RTC). An RTC provide clock timing like a watch would do. Here the clock controller is about circuit clocking. Change-Id: I1a365ae730dfc6be7686271f7fbb693e64a6ff6f Signed-off-by: Anas Nashif <anas.nashif@intel.com> Signed-off-by: Tomasz Bursztyka <tomasz.bursztyka@linux.intel.com>
2015-11-22 10:16:01 +08:00
sys_write32(0xffffffff, info->base_address);
drivers: Replace DEV_OK by 0 This patch replaces all occurences of the macro DEV_OK by the actual value 0 at the driver level. So this patch touch the files under drivers/, include/ and samples/drivers/. This patch is part of the effort to transition from DEV_* codes to errno.h codes. Change-Id: I69980ecb9755f2fb026de5668ae9c21a4ae62d1e Signed-off-by: Andre Guedes <andre.guedes@intel.com>
2016-03-10 01:01:20 +08:00
return 0;
clock: add Quark SE clock control Quark SE provides various clock controllers through its SCSS block. Peripheral, external, sensor, and others. This current drivers provides only the clock gating capability, for peripheral, external and sensor. But it could support divider and more other features once defined in the generic API. Note: such clock has _nothing_ to do with a Real Time Clock (RTC). An RTC provide clock timing like a watch would do. Here the clock controller is about circuit clocking. Change-Id: I1a365ae730dfc6be7686271f7fbb693e64a6ff6f Signed-off-by: Anas Nashif <anas.nashif@intel.com> Signed-off-by: Tomasz Bursztyka <tomasz.bursztyka@linux.intel.com>
2015-11-22 10:16:01 +08:00
}
sys_log: replace old debug macros at clock control driver Clock control drivers are now using new system log macros. also update the Kconfig variable to be a level rather than a bool. JIRA: ZEP-311 Change-Id: Ia64e79e4e083df580861f64c661f8dbaa8a3985d Signed-off-by: Genaro Saucedo Tejada <genaro.saucedo.tejada@intel.com>
2016-07-08 01:17:32 +08:00
SYS_LOG_DBG("Enabling clock gate on dev %p subsystem %u", dev, subsys);
clock: add Quark SE clock control Quark SE provides various clock controllers through its SCSS block. Peripheral, external, sensor, and others. This current drivers provides only the clock gating capability, for peripheral, external and sensor. But it could support divider and more other features once defined in the generic API. Note: such clock has _nothing_ to do with a Real Time Clock (RTC). An RTC provide clock timing like a watch would do. Here the clock controller is about circuit clocking. Change-Id: I1a365ae730dfc6be7686271f7fbb693e64a6ff6f Signed-off-by: Anas Nashif <anas.nashif@intel.com> Signed-off-by: Tomasz Bursztyka <tomasz.bursztyka@linux.intel.com>
2015-11-22 10:16:01 +08:00
return sys_test_and_set_bit(info->base_address, subsys);
}
static inline int quark_se_clock_control_off(struct device *dev,
clock_control_subsys_t sub_system)
{
clock/quark: Make config_info pointers const. Preparation for const driver configuration data. Change-Id: I0337cb574d8bac0877643b2116920d4a0c08c8f3 Signed-off-by: Marcus Shawcroft <marcus.shawcroft@arm.com>
2016-10-07 03:54:39 +08:00
const struct quark_se_clock_control_config *info = dev->config->config_info;
clock: add Quark SE clock control Quark SE provides various clock controllers through its SCSS block. Peripheral, external, sensor, and others. This current drivers provides only the clock gating capability, for peripheral, external and sensor. But it could support divider and more other features once defined in the generic API. Note: such clock has _nothing_ to do with a Real Time Clock (RTC). An RTC provide clock timing like a watch would do. Here the clock controller is about circuit clocking. Change-Id: I1a365ae730dfc6be7686271f7fbb693e64a6ff6f Signed-off-by: Anas Nashif <anas.nashif@intel.com> Signed-off-by: Tomasz Bursztyka <tomasz.bursztyka@linux.intel.com>
2015-11-22 10:16:01 +08:00
uint32_t subsys = POINTER_TO_INT(sub_system);
if (sub_system == CLOCK_CONTROL_SUBSYS_ALL) {
sys_log: replace old debug macros at clock control driver Clock control drivers are now using new system log macros. also update the Kconfig variable to be a level rather than a bool. JIRA: ZEP-311 Change-Id: Ia64e79e4e083df580861f64c661f8dbaa8a3985d Signed-off-by: Genaro Saucedo Tejada <genaro.saucedo.tejada@intel.com>
2016-07-08 01:17:32 +08:00
SYS_LOG_DBG("Disabling all clock gates on dev %p", dev);
clock: add Quark SE clock control Quark SE provides various clock controllers through its SCSS block. Peripheral, external, sensor, and others. This current drivers provides only the clock gating capability, for peripheral, external and sensor. But it could support divider and more other features once defined in the generic API. Note: such clock has _nothing_ to do with a Real Time Clock (RTC). An RTC provide clock timing like a watch would do. Here the clock controller is about circuit clocking. Change-Id: I1a365ae730dfc6be7686271f7fbb693e64a6ff6f Signed-off-by: Anas Nashif <anas.nashif@intel.com> Signed-off-by: Tomasz Bursztyka <tomasz.bursztyka@linux.intel.com>
2015-11-22 10:16:01 +08:00
sys_write32(0x00000000, info->base_address);
drivers: Replace DEV_OK by 0 This patch replaces all occurences of the macro DEV_OK by the actual value 0 at the driver level. So this patch touch the files under drivers/, include/ and samples/drivers/. This patch is part of the effort to transition from DEV_* codes to errno.h codes. Change-Id: I69980ecb9755f2fb026de5668ae9c21a4ae62d1e Signed-off-by: Andre Guedes <andre.guedes@intel.com>
2016-03-10 01:01:20 +08:00
return 0;
clock: add Quark SE clock control Quark SE provides various clock controllers through its SCSS block. Peripheral, external, sensor, and others. This current drivers provides only the clock gating capability, for peripheral, external and sensor. But it could support divider and more other features once defined in the generic API. Note: such clock has _nothing_ to do with a Real Time Clock (RTC). An RTC provide clock timing like a watch would do. Here the clock controller is about circuit clocking. Change-Id: I1a365ae730dfc6be7686271f7fbb693e64a6ff6f Signed-off-by: Anas Nashif <anas.nashif@intel.com> Signed-off-by: Tomasz Bursztyka <tomasz.bursztyka@linux.intel.com>
2015-11-22 10:16:01 +08:00
}
sys_log: replace old debug macros at clock control driver Clock control drivers are now using new system log macros. also update the Kconfig variable to be a level rather than a bool. JIRA: ZEP-311 Change-Id: Ia64e79e4e083df580861f64c661f8dbaa8a3985d Signed-off-by: Genaro Saucedo Tejada <genaro.saucedo.tejada@intel.com>
2016-07-08 01:17:32 +08:00
SYS_LOG_DBG("clock gate on dev %p subsystem %u", dev, subsys);
clock: add Quark SE clock control Quark SE provides various clock controllers through its SCSS block. Peripheral, external, sensor, and others. This current drivers provides only the clock gating capability, for peripheral, external and sensor. But it could support divider and more other features once defined in the generic API. Note: such clock has _nothing_ to do with a Real Time Clock (RTC). An RTC provide clock timing like a watch would do. Here the clock controller is about circuit clocking. Change-Id: I1a365ae730dfc6be7686271f7fbb693e64a6ff6f Signed-off-by: Anas Nashif <anas.nashif@intel.com> Signed-off-by: Tomasz Bursztyka <tomasz.bursztyka@linux.intel.com>
2015-11-22 10:16:01 +08:00
return sys_test_and_clear_bit(info->base_address, subsys);
}
drivers/quark_se_clock_control: Make driver_api const. Change-Id: I09c2c4aedf6f1e31513f857843f0718b51401f9f Signed-off-by: Marcus Shawcroft <marcus.shawcroft@arm.com>
2016-10-24 15:18:19 +08:00
static const struct clock_control_driver_api quark_se_clock_control_api = {
clock: add Quark SE clock control Quark SE provides various clock controllers through its SCSS block. Peripheral, external, sensor, and others. This current drivers provides only the clock gating capability, for peripheral, external and sensor. But it could support divider and more other features once defined in the generic API. Note: such clock has _nothing_ to do with a Real Time Clock (RTC). An RTC provide clock timing like a watch would do. Here the clock controller is about circuit clocking. Change-Id: I1a365ae730dfc6be7686271f7fbb693e64a6ff6f Signed-off-by: Anas Nashif <anas.nashif@intel.com> Signed-off-by: Tomasz Bursztyka <tomasz.bursztyka@linux.intel.com>
2015-11-22 10:16:01 +08:00
.on = quark_se_clock_control_on,
clock_control: extend API with clock rate query operation Extend the public API of clock_control driver with a function for querying of clock rate driving given peripheral. This is useful when the driver must calculate or configurae values that depend on the rate of clock driving this subsystem. A baud rate setting of UART port is an example of such operation. To configure a particular baud rate the driver may need to set the internal counters of UART port, where the actual value will depend on the clock rate for this peripheral. The implementation returns DEV_NO_SUPPORT for clock_control drivers that do not implement such functionality. Change-Id: I4e7ec96cd3678a4bb1ff289b0247488289310f2d Origin: Original Signed-off-by: Maciej Borzecki <maciek.borzecki@gmail.com>
2016-03-05 22:08:51 +08:00
.off = quark_se_clock_control_off,
.get_rate = NULL,
clock: add Quark SE clock control Quark SE provides various clock controllers through its SCSS block. Peripheral, external, sensor, and others. This current drivers provides only the clock gating capability, for peripheral, external and sensor. But it could support divider and more other features once defined in the generic API. Note: such clock has _nothing_ to do with a Real Time Clock (RTC). An RTC provide clock timing like a watch would do. Here the clock controller is about circuit clocking. Change-Id: I1a365ae730dfc6be7686271f7fbb693e64a6ff6f Signed-off-by: Anas Nashif <anas.nashif@intel.com> Signed-off-by: Tomasz Bursztyka <tomasz.bursztyka@linux.intel.com>
2015-11-22 10:16:01 +08:00
};
int quark_se_clock_control_init(struct device *dev)
{
sys_log: replace old debug macros at clock control driver Clock control drivers are now using new system log macros. also update the Kconfig variable to be a level rather than a bool. JIRA: ZEP-311 Change-Id: Ia64e79e4e083df580861f64c661f8dbaa8a3985d Signed-off-by: Genaro Saucedo Tejada <genaro.saucedo.tejada@intel.com>
2016-07-08 01:17:32 +08:00
SYS_LOG_DBG("Quark Se clock controller driver initialized on device: "
"%p", dev);
drivers: Replace DEV_OK by 0 This patch replaces all occurences of the macro DEV_OK by the actual value 0 at the driver level. So this patch touch the files under drivers/, include/ and samples/drivers/. This patch is part of the effort to transition from DEV_* codes to errno.h codes. Change-Id: I69980ecb9755f2fb026de5668ae9c21a4ae62d1e Signed-off-by: Andre Guedes <andre.guedes@intel.com>
2016-03-10 01:01:20 +08:00
return 0;
clock: add Quark SE clock control Quark SE provides various clock controllers through its SCSS block. Peripheral, external, sensor, and others. This current drivers provides only the clock gating capability, for peripheral, external and sensor. But it could support divider and more other features once defined in the generic API. Note: such clock has _nothing_ to do with a Real Time Clock (RTC). An RTC provide clock timing like a watch would do. Here the clock controller is about circuit clocking. Change-Id: I1a365ae730dfc6be7686271f7fbb693e64a6ff6f Signed-off-by: Anas Nashif <anas.nashif@intel.com> Signed-off-by: Tomasz Bursztyka <tomasz.bursztyka@linux.intel.com>
2015-11-22 10:16:01 +08:00
}
#ifdef CONFIG_CLOCK_CONTROL_QUARK_SE_PERIPHERAL
struct quark_se_clock_control_config clock_quark_se_peripheral_config = {
.base_address = CLOCK_PERIPHERAL_BASE_ADDR
};
clock_control/quark_se: convert to use DEVICE_AND_API_INIT() Change-Id: Ib3aa021b8e8c32079d5800b3f2ffc9f9fabdb4b6 Signed-off-by: Daniel Leung <daniel.leung@intel.com>
2016-04-15 00:28:33 +08:00
DEVICE_AND_API_INIT(clock_quark_se_peripheral,
device: use DEVICE_INIT everwhere This is the last step before obsoleting DEVICE_DEFINE() and DEVICE_INIT_CONFIG_DEFINE(). Change-Id: Ica4257662969048083ab9839872b4b437b8b351b Signed-off-by: Benjamin Walsh <benjamin.walsh@windriver.com>
2016-01-29 03:48:47 +08:00
CONFIG_CLOCK_CONTROL_QUARK_SE_PERIPHERAL_DRV_NAME,
&quark_se_clock_control_init,
NULL, &clock_quark_se_peripheral_config,
kernel: deprecate old init levels PRIMARY, SECONDARY, NANOKERNEL, MICROKERNEL init levels are now deprecated. New init levels introduced: PRE_KERNEL_1, PRE_KERNEL_2, POST_KERNEL to replace them. Most existing code has instances of PRIMARY replaced with PRE_KERNEL_1, SECONDARY with POST_KERNEL as SECONDARY has had a longstanding bug where the documentation specified SECONDARY ran before the kernel started up, but actually ran afterwards. Change-Id: I771bc634e9caf7f17dbf214a270bc9967eed7d32 Signed-off-by: Andrew Boie <andrew.p.boie@intel.com>
2016-11-09 03:06:55 +08:00
PRE_KERNEL_1, CONFIG_KERNEL_INIT_PRIORITY_DEVICE,
clock_control/quark_se: convert to use DEVICE_AND_API_INIT() Change-Id: Ib3aa021b8e8c32079d5800b3f2ffc9f9fabdb4b6 Signed-off-by: Daniel Leung <daniel.leung@intel.com>
2016-04-15 00:28:33 +08:00
&quark_se_clock_control_api);
clock: add Quark SE clock control Quark SE provides various clock controllers through its SCSS block. Peripheral, external, sensor, and others. This current drivers provides only the clock gating capability, for peripheral, external and sensor. But it could support divider and more other features once defined in the generic API. Note: such clock has _nothing_ to do with a Real Time Clock (RTC). An RTC provide clock timing like a watch would do. Here the clock controller is about circuit clocking. Change-Id: I1a365ae730dfc6be7686271f7fbb693e64a6ff6f Signed-off-by: Anas Nashif <anas.nashif@intel.com> Signed-off-by: Tomasz Bursztyka <tomasz.bursztyka@linux.intel.com>
2015-11-22 10:16:01 +08:00
#endif /* CONFIG_CLOCK_CONTROL_QUARK_SE_PERIPHERAL */
#ifdef CONFIG_CLOCK_CONTROL_QUARK_SE_EXTERNAL
struct quark_se_clock_control_config clock_quark_se_external_config = {
.base_address = CLOCK_EXTERNAL_BASE_ADDR
};
clock_control/quark_se: convert to use DEVICE_AND_API_INIT() Change-Id: Ib3aa021b8e8c32079d5800b3f2ffc9f9fabdb4b6 Signed-off-by: Daniel Leung <daniel.leung@intel.com>
2016-04-15 00:28:33 +08:00
DEVICE_AND_API_INIT(clock_quark_se_external,
device: use DEVICE_INIT everwhere This is the last step before obsoleting DEVICE_DEFINE() and DEVICE_INIT_CONFIG_DEFINE(). Change-Id: Ica4257662969048083ab9839872b4b437b8b351b Signed-off-by: Benjamin Walsh <benjamin.walsh@windriver.com>
2016-01-29 03:48:47 +08:00
CONFIG_CLOCK_CONTROL_QUARK_SE_EXTERNAL_DRV_NAME,
&quark_se_clock_control_init,
NULL, &clock_quark_se_external_config,
kernel: deprecate old init levels PRIMARY, SECONDARY, NANOKERNEL, MICROKERNEL init levels are now deprecated. New init levels introduced: PRE_KERNEL_1, PRE_KERNEL_2, POST_KERNEL to replace them. Most existing code has instances of PRIMARY replaced with PRE_KERNEL_1, SECONDARY with POST_KERNEL as SECONDARY has had a longstanding bug where the documentation specified SECONDARY ran before the kernel started up, but actually ran afterwards. Change-Id: I771bc634e9caf7f17dbf214a270bc9967eed7d32 Signed-off-by: Andrew Boie <andrew.p.boie@intel.com>
2016-11-09 03:06:55 +08:00
PRE_KERNEL_1, CONFIG_KERNEL_INIT_PRIORITY_DEVICE,
clock_control/quark_se: convert to use DEVICE_AND_API_INIT() Change-Id: Ib3aa021b8e8c32079d5800b3f2ffc9f9fabdb4b6 Signed-off-by: Daniel Leung <daniel.leung@intel.com>
2016-04-15 00:28:33 +08:00
&quark_se_clock_control_api);
clock: add Quark SE clock control Quark SE provides various clock controllers through its SCSS block. Peripheral, external, sensor, and others. This current drivers provides only the clock gating capability, for peripheral, external and sensor. But it could support divider and more other features once defined in the generic API. Note: such clock has _nothing_ to do with a Real Time Clock (RTC). An RTC provide clock timing like a watch would do. Here the clock controller is about circuit clocking. Change-Id: I1a365ae730dfc6be7686271f7fbb693e64a6ff6f Signed-off-by: Anas Nashif <anas.nashif@intel.com> Signed-off-by: Tomasz Bursztyka <tomasz.bursztyka@linux.intel.com>
2015-11-22 10:16:01 +08:00
#endif /* CONFIG_CLOCK_CONTROL_QUARK_SE_EXTERNAL */
#ifdef CONFIG_CLOCK_CONTROL_QUARK_SE_SENSOR
struct quark_se_clock_control_config clock_quark_se_sensor_config = {
.base_address = CLOCK_SENSOR_BASE_ADDR
};
clock_control/quark_se: convert to use DEVICE_AND_API_INIT() Change-Id: Ib3aa021b8e8c32079d5800b3f2ffc9f9fabdb4b6 Signed-off-by: Daniel Leung <daniel.leung@intel.com>
2016-04-15 00:28:33 +08:00
DEVICE_AND_API_INIT(clock_quark_se_sensor,
device: use DEVICE_INIT everwhere This is the last step before obsoleting DEVICE_DEFINE() and DEVICE_INIT_CONFIG_DEFINE(). Change-Id: Ica4257662969048083ab9839872b4b437b8b351b Signed-off-by: Benjamin Walsh <benjamin.walsh@windriver.com>
2016-01-29 03:48:47 +08:00
CONFIG_CLOCK_CONTROL_QUARK_SE_SENSOR_DRV_NAME,
&quark_se_clock_control_init,
NULL, &clock_quark_se_sensor_config,
kernel: deprecate old init levels PRIMARY, SECONDARY, NANOKERNEL, MICROKERNEL init levels are now deprecated. New init levels introduced: PRE_KERNEL_1, PRE_KERNEL_2, POST_KERNEL to replace them. Most existing code has instances of PRIMARY replaced with PRE_KERNEL_1, SECONDARY with POST_KERNEL as SECONDARY has had a longstanding bug where the documentation specified SECONDARY ran before the kernel started up, but actually ran afterwards. Change-Id: I771bc634e9caf7f17dbf214a270bc9967eed7d32 Signed-off-by: Andrew Boie <andrew.p.boie@intel.com>
2016-11-09 03:06:55 +08:00
PRE_KERNEL_1, CONFIG_KERNEL_INIT_PRIORITY_DEVICE,
clock_control/quark_se: convert to use DEVICE_AND_API_INIT() Change-Id: Ib3aa021b8e8c32079d5800b3f2ffc9f9fabdb4b6 Signed-off-by: Daniel Leung <daniel.leung@intel.com>
2016-04-15 00:28:33 +08:00
&quark_se_clock_control_api);
clock: add Quark SE clock control Quark SE provides various clock controllers through its SCSS block. Peripheral, external, sensor, and others. This current drivers provides only the clock gating capability, for peripheral, external and sensor. But it could support divider and more other features once defined in the generic API. Note: such clock has _nothing_ to do with a Real Time Clock (RTC). An RTC provide clock timing like a watch would do. Here the clock controller is about circuit clocking. Change-Id: I1a365ae730dfc6be7686271f7fbb693e64a6ff6f Signed-off-by: Anas Nashif <anas.nashif@intel.com> Signed-off-by: Tomasz Bursztyka <tomasz.bursztyka@linux.intel.com>
2015-11-22 10:16:01 +08:00
#endif /* CONFIG_CLOCK_CONTROL_QUARK_SE_SENSOR */