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kconfig: Clean up header comments and make them consistent Use this short header style in all Kconfig files: # <description> # <copyright> # <license> ... Also change all <description>s from # Kconfig[.extension] - Foo-related options to just # Foo-related options It's clear enough that it's about Kconfig. The <description> cleanup was done with this command, along with some manual cleanup (big letter at the start, etc.) git ls-files '*Kconfig*' | \ xargs sed -i -E '1 s/#\s*Kconfig[\w.-]*\s*-\s*/# /' Signed-off-by: Ulf Magnusson <Ulf.Magnusson@nordicsemi.no>
2019-11-01 20:45:29 +08:00
# Multilevel interrupt configuration
drivers/interrupt_controller: Introduce multi-level interrupt support In a scenario where a platform harbours multiple interrupts to the extent the core cannot support it, an interrupt controller is added as an additional level of interrupt. It typically combines several sources of interrupt into one line that is then routed to the parent controller. Signed-off-by: Rajavardhan Gundi <rajavardhan.gundi@intel.com>
2017-12-24 17:48:57 +08:00
# Copyright (c) 2017 Intel Corporation
drivers: interrupt_controller: multi-level improvements Some extensions to the multi-level interrupt controller are required to support SoCs with more than four level 2 interrupt "aggregators". Extend existing support to allow at most 8 level 2 or level 3 aggregators. Use Kconfig macro templates to cut down on boilerplate. Try to clarify some aspects of the Kconfig help while we're at it, and change the type of options which count things or are table offsets from "hex" to "int", so that the generated .config is easier to read. Finally, make some improvements to gen_isr_tables.py while we are here. In particular, move some assignments around to cut down on duplicated work, don't check for symbols we know must exist, and improve the debug logging output's readability. Signed-off-by: Marti Bolivar <marti@foundries.io>
2018-11-25 14:43:06 +08:00
# Copyright (c) 2018 Foundries.io
drivers/interrupt_controller: Introduce multi-level interrupt support In a scenario where a platform harbours multiple interrupts to the extent the core cannot support it, an interrupt controller is added as an additional level of interrupt. It typically combines several sources of interrupt into one line that is then routed to the parent controller. Signed-off-by: Rajavardhan Gundi <rajavardhan.gundi@intel.com>
2017-12-24 17:48:57 +08:00
# SPDX-License-Identifier: Apache-2.0
config MULTI_LEVEL_INTERRUPTS
drivers: interrupt_controller: multi-level improvements Some extensions to the multi-level interrupt controller are required to support SoCs with more than four level 2 interrupt "aggregators". Extend existing support to allow at most 8 level 2 or level 3 aggregators. Use Kconfig macro templates to cut down on boilerplate. Try to clarify some aspects of the Kconfig help while we're at it, and change the type of options which count things or are table offsets from "hex" to "int", so that the generated .config is easier to read. Finally, make some improvements to gen_isr_tables.py while we are here. In particular, move some assignments around to cut down on duplicated work, don't check for symbols we know must exist, and improve the debug logging output's readability. Signed-off-by: Marti Bolivar <marti@foundries.io>
2018-11-25 14:43:06 +08:00
bool "Multi-level interrupt support"
drivers/interrupt_controller: Introduce multi-level interrupt support In a scenario where a platform harbours multiple interrupts to the extent the core cannot support it, an interrupt controller is added as an additional level of interrupt. It typically combines several sources of interrupt into one line that is then routed to the parent controller. Signed-off-by: Rajavardhan Gundi <rajavardhan.gundi@intel.com>
2017-12-24 17:48:57 +08:00
depends on GEN_SW_ISR_TABLE
help
Multiple levels of interrupts are normally used to increase the
drivers: interrupt_controller: multi-level improvements Some extensions to the multi-level interrupt controller are required to support SoCs with more than four level 2 interrupt "aggregators". Extend existing support to allow at most 8 level 2 or level 3 aggregators. Use Kconfig macro templates to cut down on boilerplate. Try to clarify some aspects of the Kconfig help while we're at it, and change the type of options which count things or are table offsets from "hex" to "int", so that the generated .config is easier to read. Finally, make some improvements to gen_isr_tables.py while we are here. In particular, move some assignments around to cut down on duplicated work, don't check for symbols we know must exist, and improve the debug logging output's readability. Signed-off-by: Marti Bolivar <marti@foundries.io>
2018-11-25 14:43:06 +08:00
number of addressable interrupts in a system. For example, if two
levels are used, a second level interrupt aggregator would combine
all interrupts routed to it into one IRQ line in the first level
interrupt controller. If three levels are used, a third level
aggregator combines its input interrupts into one IRQ line at the
second level. The number of interrupt levels is usually determined
by the hardware. (The term "aggregator" here means "interrupt
controller".)
drivers/interrupt_controller: Introduce multi-level interrupt support In a scenario where a platform harbours multiple interrupts to the extent the core cannot support it, an interrupt controller is added as an additional level of interrupt. It typically combines several sources of interrupt into one line that is then routed to the parent controller. Signed-off-by: Rajavardhan Gundi <rajavardhan.gundi@intel.com>
2017-12-24 17:48:57 +08:00
drivers: intc: manage multi-level interrupt configs Multilevel interrupt configs are leaking into every single build without this option being enabled, so guard the Kconfig and include files to avoid this. Signed-off-by: Anas Nashif <anas.nashif@intel.com>
2023-12-08 03:20:32 +08:00
if MULTI_LEVEL_INTERRUPTS
scripts: build: gen_isr_tables: make bit masks configurable Some architectures such as RISC-v support more than 255 interrupts per aggrigator. This diff adds the ability to forgo the aggrigator pattern and use a configurable number of bits for multilevel interruts. Signed-off-by: Joshua Lilly <jgl@meta.com>
2023-08-02 05:44:51 +08:00
config 1ST_LEVEL_INTERRUPT_BITS
int "Total number of first level interrupt bits"
range 1 32
default 8
help
The number of bits to use of the 32 bit interrupt mask for first
tier interrupts.
drivers/interrupt_controller: Introduce multi-level interrupt support In a scenario where a platform harbours multiple interrupts to the extent the core cannot support it, an interrupt controller is added as an additional level of interrupt. It typically combines several sources of interrupt into one line that is then routed to the parent controller. Signed-off-by: Rajavardhan Gundi <rajavardhan.gundi@intel.com>
2017-12-24 17:48:57 +08:00
config MAX_IRQ_PER_AGGREGATOR
int "Max IRQs per interrupt aggregator"
default 0
scripts: build: gen_isr_tables: make bit masks configurable Some architectures such as RISC-v support more than 255 interrupts per aggrigator. This diff adds the ability to forgo the aggrigator pattern and use a configurable number of bits for multilevel interruts. Signed-off-by: Joshua Lilly <jgl@meta.com>
2023-08-02 05:44:51 +08:00
drivers/interrupt_controller: Introduce multi-level interrupt support In a scenario where a platform harbours multiple interrupts to the extent the core cannot support it, an interrupt controller is added as an additional level of interrupt. It typically combines several sources of interrupt into one line that is then routed to the parent controller. Signed-off-by: Rajavardhan Gundi <rajavardhan.gundi@intel.com>
2017-12-24 17:48:57 +08:00
help
drivers: interrupt_controller: multi-level improvements Some extensions to the multi-level interrupt controller are required to support SoCs with more than four level 2 interrupt "aggregators". Extend existing support to allow at most 8 level 2 or level 3 aggregators. Use Kconfig macro templates to cut down on boilerplate. Try to clarify some aspects of the Kconfig help while we're at it, and change the type of options which count things or are table offsets from "hex" to "int", so that the generated .config is easier to read. Finally, make some improvements to gen_isr_tables.py while we are here. In particular, move some assignments around to cut down on duplicated work, don't check for symbols we know must exist, and improve the debug logging output's readability. Signed-off-by: Marti Bolivar <marti@foundries.io>
2018-11-25 14:43:06 +08:00
The maximum number of interrupt inputs to any aggregator in the
system.
drivers/interrupt_controller: Introduce multi-level interrupt support In a scenario where a platform harbours multiple interrupts to the extent the core cannot support it, an interrupt controller is added as an additional level of interrupt. It typically combines several sources of interrupt into one line that is then routed to the parent controller. Signed-off-by: Rajavardhan Gundi <rajavardhan.gundi@intel.com>
2017-12-24 17:48:57 +08:00
config 2ND_LEVEL_INTERRUPTS
drivers: interrupt_controller: multi-level improvements Some extensions to the multi-level interrupt controller are required to support SoCs with more than four level 2 interrupt "aggregators". Extend existing support to allow at most 8 level 2 or level 3 aggregators. Use Kconfig macro templates to cut down on boilerplate. Try to clarify some aspects of the Kconfig help while we're at it, and change the type of options which count things or are table offsets from "hex" to "int", so that the generated .config is easier to read. Finally, make some improvements to gen_isr_tables.py while we are here. In particular, move some assignments around to cut down on duplicated work, don't check for symbols we know must exist, and improve the debug logging output's readability. Signed-off-by: Marti Bolivar <marti@foundries.io>
2018-11-25 14:43:06 +08:00
bool "Second-level interrupt support"
drivers/interrupt_controller: Introduce multi-level interrupt support In a scenario where a platform harbours multiple interrupts to the extent the core cannot support it, an interrupt controller is added as an additional level of interrupt. It typically combines several sources of interrupt into one line that is then routed to the parent controller. Signed-off-by: Rajavardhan Gundi <rajavardhan.gundi@intel.com>
2017-12-24 17:48:57 +08:00
help
Second level interrupts are used to increase the number of
addressable interrupts in a system.
config 2ND_LVL_ISR_TBL_OFFSET
drivers: interrupt_controller: multi-level improvements Some extensions to the multi-level interrupt controller are required to support SoCs with more than four level 2 interrupt "aggregators". Extend existing support to allow at most 8 level 2 or level 3 aggregators. Use Kconfig macro templates to cut down on boilerplate. Try to clarify some aspects of the Kconfig help while we're at it, and change the type of options which count things or are table offsets from "hex" to "int", so that the generated .config is easier to read. Finally, make some improvements to gen_isr_tables.py while we are here. In particular, move some assignments around to cut down on duplicated work, don't check for symbols we know must exist, and improve the debug logging output's readability. Signed-off-by: Marti Bolivar <marti@foundries.io>
2018-11-25 14:43:06 +08:00
int "Offset in _sw_isr_table for level 2 interrupts"
drivers/interrupt_controller: Introduce multi-level interrupt support In a scenario where a platform harbours multiple interrupts to the extent the core cannot support it, an interrupt controller is added as an additional level of interrupt. It typically combines several sources of interrupt into one line that is then routed to the parent controller. Signed-off-by: Rajavardhan Gundi <rajavardhan.gundi@intel.com>
2017-12-24 17:48:57 +08:00
default 0
depends on 2ND_LEVEL_INTERRUPTS
help
drivers: interrupt_controller: multi-level improvements Some extensions to the multi-level interrupt controller are required to support SoCs with more than four level 2 interrupt "aggregators". Extend existing support to allow at most 8 level 2 or level 3 aggregators. Use Kconfig macro templates to cut down on boilerplate. Try to clarify some aspects of the Kconfig help while we're at it, and change the type of options which count things or are table offsets from "hex" to "int", so that the generated .config is easier to read. Finally, make some improvements to gen_isr_tables.py while we are here. In particular, move some assignments around to cut down on duplicated work, don't check for symbols we know must exist, and improve the debug logging output's readability. Signed-off-by: Marti Bolivar <marti@foundries.io>
2018-11-25 14:43:06 +08:00
This is the offset in _sw_isr_table, the generated ISR handler table,
where storage for 2nd level interrupt ISRs begins. This is
typically allocated after ISRs for level 1 interrupts.
drivers/interrupt_controller: Introduce multi-level interrupt support In a scenario where a platform harbours multiple interrupts to the extent the core cannot support it, an interrupt controller is added as an additional level of interrupt. It typically combines several sources of interrupt into one line that is then routed to the parent controller. Signed-off-by: Rajavardhan Gundi <rajavardhan.gundi@intel.com>
2017-12-24 17:48:57 +08:00
drivers: interrupt_controller: multi-level improvements Some extensions to the multi-level interrupt controller are required to support SoCs with more than four level 2 interrupt "aggregators". Extend existing support to allow at most 8 level 2 or level 3 aggregators. Use Kconfig macro templates to cut down on boilerplate. Try to clarify some aspects of the Kconfig help while we're at it, and change the type of options which count things or are table offsets from "hex" to "int", so that the generated .config is easier to read. Finally, make some improvements to gen_isr_tables.py while we are here. In particular, move some assignments around to cut down on duplicated work, don't check for symbols we know must exist, and improve the debug logging output's readability. Signed-off-by: Marti Bolivar <marti@foundries.io>
2018-11-25 14:43:06 +08:00
config NUM_2ND_LEVEL_AGGREGATORS
int "Total number of second level interrupt aggregators"
range 1 8
default 1
drivers/interrupt_controller: Introduce multi-level interrupt support In a scenario where a platform harbours multiple interrupts to the extent the core cannot support it, an interrupt controller is added as an additional level of interrupt. It typically combines several sources of interrupt into one line that is then routed to the parent controller. Signed-off-by: Rajavardhan Gundi <rajavardhan.gundi@intel.com>
2017-12-24 17:48:57 +08:00
depends on 2ND_LEVEL_INTERRUPTS
help
drivers: interrupt_controller: multi-level improvements Some extensions to the multi-level interrupt controller are required to support SoCs with more than four level 2 interrupt "aggregators". Extend existing support to allow at most 8 level 2 or level 3 aggregators. Use Kconfig macro templates to cut down on boilerplate. Try to clarify some aspects of the Kconfig help while we're at it, and change the type of options which count things or are table offsets from "hex" to "int", so that the generated .config is easier to read. Finally, make some improvements to gen_isr_tables.py while we are here. In particular, move some assignments around to cut down on duplicated work, don't check for symbols we know must exist, and improve the debug logging output's readability. Signed-off-by: Marti Bolivar <marti@foundries.io>
2018-11-25 14:43:06 +08:00
The number of level 2 interrupt aggregators to support. Each
aggregator can manage at most MAX_IRQ_PER_AGGREGATOR level 2
interrupts.
drivers/interrupt_controller: Introduce multi-level interrupt support In a scenario where a platform harbours multiple interrupts to the extent the core cannot support it, an interrupt controller is added as an additional level of interrupt. It typically combines several sources of interrupt into one line that is then routed to the parent controller. Signed-off-by: Rajavardhan Gundi <rajavardhan.gundi@intel.com>
2017-12-24 17:48:57 +08:00
scripts: build: gen_isr_tables: make bit masks configurable Some architectures such as RISC-v support more than 255 interrupts per aggrigator. This diff adds the ability to forgo the aggrigator pattern and use a configurable number of bits for multilevel interruts. Signed-off-by: Joshua Lilly <jgl@meta.com>
2023-08-02 05:44:51 +08:00
config 2ND_LEVEL_INTERRUPT_BITS
int "Total number of second level interrupt bits"
range 0 31
default 8
help
The number of bits to use of the 32 bit interrupt mask for second
tier interrupts.
drivers: interrupt_controller: multi-level improvements Some extensions to the multi-level interrupt controller are required to support SoCs with more than four level 2 interrupt "aggregators". Extend existing support to allow at most 8 level 2 or level 3 aggregators. Use Kconfig macro templates to cut down on boilerplate. Try to clarify some aspects of the Kconfig help while we're at it, and change the type of options which count things or are table offsets from "hex" to "int", so that the generated .config is easier to read. Finally, make some improvements to gen_isr_tables.py while we are here. In particular, move some assignments around to cut down on duplicated work, don't check for symbols we know must exist, and improve the debug logging output's readability. Signed-off-by: Marti Bolivar <marti@foundries.io>
2018-11-25 14:43:06 +08:00
prev-level-num = 1
cur-level-num = 2
cur-level = 2ND
aggregator = 0
rsource "Kconfig.multilevel.aggregator_template"
aggregator = 1
rsource "Kconfig.multilevel.aggregator_template"
aggregator = 2
rsource "Kconfig.multilevel.aggregator_template"
aggregator = 3
rsource "Kconfig.multilevel.aggregator_template"
aggregator = 4
rsource "Kconfig.multilevel.aggregator_template"
aggregator = 5
rsource "Kconfig.multilevel.aggregator_template"
aggregator = 6
rsource "Kconfig.multilevel.aggregator_template"
aggregator = 7
rsource "Kconfig.multilevel.aggregator_template"
drivers/interrupt_controller: Introduce multi-level interrupt support In a scenario where a platform harbours multiple interrupts to the extent the core cannot support it, an interrupt controller is added as an additional level of interrupt. It typically combines several sources of interrupt into one line that is then routed to the parent controller. Signed-off-by: Rajavardhan Gundi <rajavardhan.gundi@intel.com>
2017-12-24 17:48:57 +08:00
config 3RD_LEVEL_INTERRUPTS
drivers: interrupt_controller: multi-level improvements Some extensions to the multi-level interrupt controller are required to support SoCs with more than four level 2 interrupt "aggregators". Extend existing support to allow at most 8 level 2 or level 3 aggregators. Use Kconfig macro templates to cut down on boilerplate. Try to clarify some aspects of the Kconfig help while we're at it, and change the type of options which count things or are table offsets from "hex" to "int", so that the generated .config is easier to read. Finally, make some improvements to gen_isr_tables.py while we are here. In particular, move some assignments around to cut down on duplicated work, don't check for symbols we know must exist, and improve the debug logging output's readability. Signed-off-by: Marti Bolivar <marti@foundries.io>
2018-11-25 14:43:06 +08:00
bool "Third-level interrupt support"
drivers/interrupt_controller: Introduce multi-level interrupt support In a scenario where a platform harbours multiple interrupts to the extent the core cannot support it, an interrupt controller is added as an additional level of interrupt. It typically combines several sources of interrupt into one line that is then routed to the parent controller. Signed-off-by: Rajavardhan Gundi <rajavardhan.gundi@intel.com>
2017-12-24 17:48:57 +08:00
depends on 2ND_LEVEL_INTERRUPTS
help
Third level interrupts are used to increase the number of
addressable interrupts in a system.
config NUM_3RD_LEVEL_AGGREGATORS
drivers: interrupt_controller: multi-level improvements Some extensions to the multi-level interrupt controller are required to support SoCs with more than four level 2 interrupt "aggregators". Extend existing support to allow at most 8 level 2 or level 3 aggregators. Use Kconfig macro templates to cut down on boilerplate. Try to clarify some aspects of the Kconfig help while we're at it, and change the type of options which count things or are table offsets from "hex" to "int", so that the generated .config is easier to read. Finally, make some improvements to gen_isr_tables.py while we are here. In particular, move some assignments around to cut down on duplicated work, don't check for symbols we know must exist, and improve the debug logging output's readability. Signed-off-by: Marti Bolivar <marti@foundries.io>
2018-11-25 14:43:06 +08:00
int "Total number of third level interrupt aggregators"
range 1 8
default 1
drivers/interrupt_controller: Introduce multi-level interrupt support In a scenario where a platform harbours multiple interrupts to the extent the core cannot support it, an interrupt controller is added as an additional level of interrupt. It typically combines several sources of interrupt into one line that is then routed to the parent controller. Signed-off-by: Rajavardhan Gundi <rajavardhan.gundi@intel.com>
2017-12-24 17:48:57 +08:00
depends on 3RD_LEVEL_INTERRUPTS
help
drivers: interrupt_controller: multi-level improvements Some extensions to the multi-level interrupt controller are required to support SoCs with more than four level 2 interrupt "aggregators". Extend existing support to allow at most 8 level 2 or level 3 aggregators. Use Kconfig macro templates to cut down on boilerplate. Try to clarify some aspects of the Kconfig help while we're at it, and change the type of options which count things or are table offsets from "hex" to "int", so that the generated .config is easier to read. Finally, make some improvements to gen_isr_tables.py while we are here. In particular, move some assignments around to cut down on duplicated work, don't check for symbols we know must exist, and improve the debug logging output's readability. Signed-off-by: Marti Bolivar <marti@foundries.io>
2018-11-25 14:43:06 +08:00
The number of level 3 interrupt aggregators to support. Each
aggregator can manage at most MAX_IRQ_PER_AGGREGATOR level 3
interrupts.
drivers/interrupt_controller: Introduce multi-level interrupt support In a scenario where a platform harbours multiple interrupts to the extent the core cannot support it, an interrupt controller is added as an additional level of interrupt. It typically combines several sources of interrupt into one line that is then routed to the parent controller. Signed-off-by: Rajavardhan Gundi <rajavardhan.gundi@intel.com>
2017-12-24 17:48:57 +08:00
config 3RD_LVL_ISR_TBL_OFFSET
drivers: interrupt_controller: multi-level improvements Some extensions to the multi-level interrupt controller are required to support SoCs with more than four level 2 interrupt "aggregators". Extend existing support to allow at most 8 level 2 or level 3 aggregators. Use Kconfig macro templates to cut down on boilerplate. Try to clarify some aspects of the Kconfig help while we're at it, and change the type of options which count things or are table offsets from "hex" to "int", so that the generated .config is easier to read. Finally, make some improvements to gen_isr_tables.py while we are here. In particular, move some assignments around to cut down on duplicated work, don't check for symbols we know must exist, and improve the debug logging output's readability. Signed-off-by: Marti Bolivar <marti@foundries.io>
2018-11-25 14:43:06 +08:00
int "Offset in _sw_isr_table for level 3 interrupts"
drivers/interrupt_controller: Introduce multi-level interrupt support In a scenario where a platform harbours multiple interrupts to the extent the core cannot support it, an interrupt controller is added as an additional level of interrupt. It typically combines several sources of interrupt into one line that is then routed to the parent controller. Signed-off-by: Rajavardhan Gundi <rajavardhan.gundi@intel.com>
2017-12-24 17:48:57 +08:00
default 0
depends on 3RD_LEVEL_INTERRUPTS
help
drivers: interrupt_controller: multi-level improvements Some extensions to the multi-level interrupt controller are required to support SoCs with more than four level 2 interrupt "aggregators". Extend existing support to allow at most 8 level 2 or level 3 aggregators. Use Kconfig macro templates to cut down on boilerplate. Try to clarify some aspects of the Kconfig help while we're at it, and change the type of options which count things or are table offsets from "hex" to "int", so that the generated .config is easier to read. Finally, make some improvements to gen_isr_tables.py while we are here. In particular, move some assignments around to cut down on duplicated work, don't check for symbols we know must exist, and improve the debug logging output's readability. Signed-off-by: Marti Bolivar <marti@foundries.io>
2018-11-25 14:43:06 +08:00
This is the offset in _sw_isr_table, the generated ISR handler table,
where storage for 3rd level interrupt ISRs begins. This is
typically allocated after ISRs for level 2 interrupts.
drivers/interrupt_controller: Introduce multi-level interrupt support In a scenario where a platform harbours multiple interrupts to the extent the core cannot support it, an interrupt controller is added as an additional level of interrupt. It typically combines several sources of interrupt into one line that is then routed to the parent controller. Signed-off-by: Rajavardhan Gundi <rajavardhan.gundi@intel.com>
2017-12-24 17:48:57 +08:00
scripts: build: gen_isr_tables: make bit masks configurable Some architectures such as RISC-v support more than 255 interrupts per aggrigator. This diff adds the ability to forgo the aggrigator pattern and use a configurable number of bits for multilevel interruts. Signed-off-by: Joshua Lilly <jgl@meta.com>
2023-08-02 05:44:51 +08:00
config 3RD_LEVEL_INTERRUPT_BITS
int "Total number of third level interrupt bits"
range 0 30
default 8
help
The number of bits to use of the 32 bit interrupt mask for third
tier interrupts.
drivers: interrupt_controller: multi-level improvements Some extensions to the multi-level interrupt controller are required to support SoCs with more than four level 2 interrupt "aggregators". Extend existing support to allow at most 8 level 2 or level 3 aggregators. Use Kconfig macro templates to cut down on boilerplate. Try to clarify some aspects of the Kconfig help while we're at it, and change the type of options which count things or are table offsets from "hex" to "int", so that the generated .config is easier to read. Finally, make some improvements to gen_isr_tables.py while we are here. In particular, move some assignments around to cut down on duplicated work, don't check for symbols we know must exist, and improve the debug logging output's readability. Signed-off-by: Marti Bolivar <marti@foundries.io>
2018-11-25 14:43:06 +08:00
prev-level-num = 2
cur-level-num = 3
cur-level = 3RD
aggregator = 0
rsource "Kconfig.multilevel.aggregator_template"
aggregator = 1
rsource "Kconfig.multilevel.aggregator_template"
aggregator = 2
rsource "Kconfig.multilevel.aggregator_template"
aggregator = 3
rsource "Kconfig.multilevel.aggregator_template"
aggregator = 4
rsource "Kconfig.multilevel.aggregator_template"
aggregator = 5
rsource "Kconfig.multilevel.aggregator_template"
aggregator = 6
rsource "Kconfig.multilevel.aggregator_template"
aggregator = 7
rsource "Kconfig.multilevel.aggregator_template"
drivers: intc: manage multi-level interrupt configs Multilevel interrupt configs are leaking into every single build without this option being enabled, so guard the Kconfig and include files to avoid this. Signed-off-by: Anas Nashif <anas.nashif@intel.com>
2023-12-08 03:20:32 +08:00
endif