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zephyr/drivers/pinmux/stm32/pinmux_stm32f1.h

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soc/stm32f1/pinmux: implement STM32 pinmux integration Add necessary integration code enabling use of common STM32 pinmux driver. The alternate function listing currently consists of USART1 pins only. The listing should be updated when support for more devices is added. Change-Id: Ic65aeea9df9aaea7636ecdd6996f56e6ef59dc2f Origin: Original Signed-off-by: Maciej Borzecki <maciek.borzecki@gmail.com>
2016-03-06 20:53:00 +08:00
/*
* Copyright (c) 2016 Open-RnD Sp. z o.o.
*
license: Replace Apache boilerplate with SPDX tag Replace the existing Apache 2.0 boilerplate header with an SPDX tag throughout the zephyr code tree. This patch was generated via a script run over the master branch. Also updated doc/porting/application.rst that had a dependency on line numbers in a literal include. Manually updated subsys/logging/sys_log.c that had a malformed header in the original file. Also cleanup several cases that already had a SPDX tag and we either got a duplicate or missed updating. Jira: ZEP-1457 Change-Id: I6131a1d4ee0e58f5b938300c2d2fc77d2e69572c Signed-off-by: David B. Kinder <david.b.kinder@intel.com> Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
2017-01-19 09:01:01 +08:00
* SPDX-License-Identifier: Apache-2.0
soc/stm32f1/pinmux: implement STM32 pinmux integration Add necessary integration code enabling use of common STM32 pinmux driver. The alternate function listing currently consists of USART1 pins only. The listing should be updated when support for more devices is added. Change-Id: Ic65aeea9df9aaea7636ecdd6996f56e6ef59dc2f Origin: Original Signed-off-by: Maciej Borzecki <maciek.borzecki@gmail.com>
2016-03-06 20:53:00 +08:00
*/
#ifndef _STM32F1_PINMUX_H_
#define _STM32F1_PINMUX_H_
/**
* @file Header for STM32F1 pin multiplexing helper
*/
arch: stm32f1: rework pinmux driver Rework stm32f1 pinmux code for future dts based pinmux code generation. Pin configuration is now done directly thanks to gpio port configuration. Reference to pseudo alternate functions are now removed same as the use of pins[] array. Pins function (uart tx for instance) is set implicitly by defining gpio mode and configuration. This behavior is specific to stm32f10x series. Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
2017-07-25 17:57:28 +08:00
#define STM32F1_PINMUX_FUNC_PA9_USART1_TX STM32_PIN_USART_TX
#define STM32F1_PINMUX_FUNC_PA10_USART1_RX STM32_PIN_USART_RX
soc/stm32f1/pinmux: implement STM32 pinmux integration Add necessary integration code enabling use of common STM32 pinmux driver. The alternate function listing currently consists of USART1 pins only. The listing should be updated when support for more devices is added. Change-Id: Ic65aeea9df9aaea7636ecdd6996f56e6ef59dc2f Origin: Original Signed-off-by: Maciej Borzecki <maciek.borzecki@gmail.com>
2016-03-06 20:53:00 +08:00
arch: stm32f1: rework pinmux driver Rework stm32f1 pinmux code for future dts based pinmux code generation. Pin configuration is now done directly thanks to gpio port configuration. Reference to pseudo alternate functions are now removed same as the use of pins[] array. Pins function (uart tx for instance) is set implicitly by defining gpio mode and configuration. This behavior is specific to stm32f10x series. Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
2017-07-25 17:57:28 +08:00
#define STM32F1_PINMUX_FUNC_PA2_USART2_TX STM32_PIN_USART_TX
#define STM32F1_PINMUX_FUNC_PA3_USART2_RX STM32_PIN_USART_RX
soc/stm32f1/pinmux: implement STM32 pinmux integration Add necessary integration code enabling use of common STM32 pinmux driver. The alternate function listing currently consists of USART1 pins only. The listing should be updated when support for more devices is added. Change-Id: Ic65aeea9df9aaea7636ecdd6996f56e6ef59dc2f Origin: Original Signed-off-by: Maciej Borzecki <maciek.borzecki@gmail.com>
2016-03-06 20:53:00 +08:00
arch: stm32f1: rework pinmux driver Rework stm32f1 pinmux code for future dts based pinmux code generation. Pin configuration is now done directly thanks to gpio port configuration. Reference to pseudo alternate functions are now removed same as the use of pins[] array. Pins function (uart tx for instance) is set implicitly by defining gpio mode and configuration. This behavior is specific to stm32f10x series. Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
2017-07-25 17:57:28 +08:00
#define STM32F1_PINMUX_FUNC_PD5_USART2_TX STM32_PIN_USART_TX
#define STM32F1_PINMUX_FUNC_PD6_USART2_RX STM32_PIN_USART_RX
pinmux/stm32: default pin assignment for STM3210C-EVAL board Change-Id: I87c3806b2fad649c67e8d66981ff6a99168fda72 Signed-off-by: Adam Podogrocki <adam.podogrocki@rndity.com>
2017-01-07 00:29:53 +08:00
arch: stm32f1: rework pinmux driver Rework stm32f1 pinmux code for future dts based pinmux code generation. Pin configuration is now done directly thanks to gpio port configuration. Reference to pseudo alternate functions are now removed same as the use of pins[] array. Pins function (uart tx for instance) is set implicitly by defining gpio mode and configuration. This behavior is specific to stm32f10x series. Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
2017-07-25 17:57:28 +08:00
#define STM32F1_PINMUX_FUNC_PB6_I2C1_SCL STM32_PIN_I2C
#define STM32F1_PINMUX_FUNC_PB7_I2C1_SDA STM32_PIN_I2C
#define STM32F1_PINMUX_FUNC_PB8_I2C1_SCL STM32_PIN_I2C
#define STM32F1_PINMUX_FUNC_PB9_I2C1_SDA STM32_PIN_I2C
soc/stm32f1/pinmux: implement STM32 pinmux integration Add necessary integration code enabling use of common STM32 pinmux driver. The alternate function listing currently consists of USART1 pins only. The listing should be updated when support for more devices is added. Change-Id: Ic65aeea9df9aaea7636ecdd6996f56e6ef59dc2f Origin: Original Signed-off-by: Maciej Borzecki <maciek.borzecki@gmail.com>
2016-03-06 20:53:00 +08:00
arch: stm32f1: rework pinmux driver Rework stm32f1 pinmux code for future dts based pinmux code generation. Pin configuration is now done directly thanks to gpio port configuration. Reference to pseudo alternate functions are now removed same as the use of pins[] array. Pins function (uart tx for instance) is set implicitly by defining gpio mode and configuration. This behavior is specific to stm32f10x series. Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
2017-07-25 17:57:28 +08:00
#define STM32F1_PINMUX_FUNC_PB10_USART3_TX STM32_PIN_USART_TX
#define STM32F1_PINMUX_FUNC_PB11_USART3_RX STM32_PIN_USART_RX
#define STM32F1_PINMUX_FUNC_PB10_I2C2_SCL STM32_PIN_I2C
#define STM32F1_PINMUX_FUNC_PB11_I2C2_SDA STM32_PIN_I2C
#define STM32F1_PINMUX_FUNC_PA8_PWM1_CH1 STM32_PIN_PWM
soc/stm32f1/pinmux: implement STM32 pinmux integration Add necessary integration code enabling use of common STM32 pinmux driver. The alternate function listing currently consists of USART1 pins only. The listing should be updated when support for more devices is added. Change-Id: Ic65aeea9df9aaea7636ecdd6996f56e6ef59dc2f Origin: Original Signed-off-by: Maciej Borzecki <maciek.borzecki@gmail.com>
2016-03-06 20:53:00 +08:00
#endif /* _STM32F1_PINMUX_H_ */