55 lines
1.5 KiB
C
55 lines
1.5 KiB
C
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/*
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* Copyright (c) 2024 Antmicro <www.antmicro.com>
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*
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* SPDX-License-Identifier: Apache-2.0
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*/
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#ifndef ZEPHYR_SOC_ARM_XLNX_ZYNQMP_SOC_PINCTRL_H_
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#define ZEPHYR_SOC_ARM_XLNX_ZYNQMP_SOC_PINCTRL_H_
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#include <zephyr/devicetree.h>
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#include <zephyr/sys/util.h>
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#include <zephyr/types.h>
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#define MIO_L0_SEL BIT(1)
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#define MIO_L1_SEL BIT(2)
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#define MIO_L2_SEL GENMASK(4, 3)
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#define MIO_L3_SEL GENMASK(7, 5)
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/* All other selectors should be zeroed and FIELD_PREP does that */
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#define UARTX_SEL FIELD_PREP(MIO_L3_SEL, 6)
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/*
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* Each peripheral PINCTRL mask is defined as such:
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* [7 ... 0] MIO register number
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* [15 ... 8] Function, mapped as:
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* 1 - UART
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*
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* The function numbers serve as an enumerator in the pinctrl driver
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* and the defines controling those are listed in `pinctrl-zynqmp.h`.
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* Currently, one function for UART is specified and subsequent ones
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* can be added when the need arises.
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*/
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typedef struct pinctrl_soc_pin_t {
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uint32_t pin;
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uint32_t func;
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} pinctrl_soc_pin_t;
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#define ZYNQMP_GET_PIN(pinctrl) (pinctrl & 0xff)
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#define ZYNQMP_GET_FUNC(pinctrl) ((pinctrl >> 8) & 0xff)
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#define Z_PINCTRL_STATE_PIN_INIT(node_id, prop, idx) \
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{ \
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.pin = ZYNQMP_GET_PIN(DT_PROP_BY_IDX(node_id, prop, idx)), \
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.func = ZYNQMP_GET_FUNC(DT_PROP_BY_IDX(node_id, prop, idx)), \
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},
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#define Z_PINCTRL_STATE_PINS_INIT(node_id, prop) { \
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DT_FOREACH_CHILD_VARGS(DT_PHANDLE(node_id, prop), \
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DT_FOREACH_PROP_ELEM, pinmux, \
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Z_PINCTRL_STATE_PIN_INIT)}
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#endif
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