88 lines
3.6 KiB
C
88 lines
3.6 KiB
C
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/*
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* Copyright (c) 2018 Intel Corporation
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* SPDX-License-Identifier: Apache-2.0
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*/
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#ifndef __INTEL_S1000_IOMUX_H
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#define __INTEL_S1000_IOMUX_H
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/*
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* +----------------------+-------------------------------------------------+
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* | Table of Possible I/O MUX settings |
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* +----------------------+-------------------------------------------------+
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* | Pin group | FUNC_A (Default) | FUNC_B (Available Alternate) |
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* +----------------------+-------------------------------------------------+
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* | PIN_GROUP(EM_DQ) | EM_DQ | MST_DQ |
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* | PIN_GROUP(GPIO_PWM0) | GPIO | PWM |
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* | PIN_GROUP(GPIO_PWM1) | GPIO | PWM |
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* | PIN_GROUP(GPIO_PWM2) | GPIO | PWM |
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* | PIN_GROUP(GPIO_PWM3) | GPIO | PWM |
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* | PIN_GROUP(GPIO_PWM4) | GPIO | PWM |
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* | PIN_GROUP(GPIO_PWM5) | GPIO | PWM |
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* | PIN_GROUP(GPIO_PWM6) | GPIO | PWM |
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* | PIN_GROUP(GPIO_PWM7) | GPIO | PWM |
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* | PIN_GROUP(HOST_IRQ) | HOST_IRQ | GPIO14 |
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* | PIN_GROUP(HOST_WAKE) | HOST_WAKE | GPIO13 |
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* | PIN_GROUP(I2S0) | I2S | PDM |
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* | PIN_GROUP(I2S2) | I2S | GPIO |
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* | PIN_GROUP(I2S3) | I2S | GPIO |
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* | PIN_GROUP(MST_SS1) | MST_SS1 | GPIO25 |
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* | PIN_GROUP(PDM_0_1) | PDM_0_1 | GPIO |
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* | PIN_GROUP(UART) | UART | GPIO |
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* | PIN_GROUP(I2C) | I2C0 | I2C1 |
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* +----------------------+-------------------------------------------------+
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*/
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#define PIN_GROUP(group) IOMUX_PINGROUP_ ## group
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/*
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* IO Selector is a bit encoding of the mux control register and the
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* bits selecting the mux in the mux control register
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*/
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#define IO_SEL(iomux, lsb, msb) ((iomux) | ((lsb) << 8) | ((msb) << 16))
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#define IOMUX_INDEX(pingroup) ((pingroup) & BIT_MASK(8))
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#define IOMUX_LSB(pingroup) (((pingroup) >> 8) & BIT_MASK(8))
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#define IOMUX_MSB(pingroup) (((pingroup) >> 16) & BIT_MASK(8))
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/* PSRAM DQ/WAIT or SPI Master DQ/DQS */
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#define IOMUX_PINGROUP_EM_DQ IO_SEL(0, 25, 25)
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/* GPIO or PWM */
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#define IOMUX_PINGROUP_GPIO_PWM0 IO_SEL(1, 0, 1)
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#define IOMUX_PINGROUP_GPIO_PWM1 IO_SEL(1, 2, 3)
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#define IOMUX_PINGROUP_GPIO_PWM2 IO_SEL(1, 4, 5)
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#define IOMUX_PINGROUP_GPIO_PWM3 IO_SEL(1, 6, 7)
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#define IOMUX_PINGROUP_GPIO_PWM4 IO_SEL(1, 8, 9)
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#define IOMUX_PINGROUP_GPIO_PWM5 IO_SEL(1, 10, 11)
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#define IOMUX_PINGROUP_GPIO_PWM6 IO_SEL(1, 12, 13)
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#define IOMUX_PINGROUP_GPIO_PWM7 IO_SEL(1, 14, 15)
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/* HOST_IRQ or GPIO14 */
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#define IOMUX_PINGROUP_HOST_IRQ IO_SEL(0, 1, 1)
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/* HOST_WAKE or GPIO13 */
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#define IOMUX_PINGROUP_HOST_WAKE IO_SEL(0, 0, 0)
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/* I2S0 or PDM2/3 */
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#define IOMUX_PINGROUP_I2S0 IO_SEL(0, 8, 8)
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/* I2S2 or GPIO */
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#define IOMUX_PINGROUP_I2S2 IO_SEL(0, 9, 9)
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/* I2S3 or GPIO */
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#define IOMUX_PINGROUP_I2S3 IO_SEL(0, 10, 10)
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/* SPI Master SS #1 MST_SS1 or GPIO 25 */
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#define IOMUX_PINGROUP_MST_SS1 IO_SEL(0, 26, 26)
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/* PDM0/1 or GPIO */
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#define IOMUX_PINGROUP_PDM_0_1 IO_SEL(0, 11, 11)
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/* UART CTS/RTS or GPIO */
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#define IOMUX_PINGROUP_UART IO_SEL(0, 16, 16)
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/* I2C0 or I2C1 */
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#define IOMUX_PINGROUP_I2C IO_SEL(2, 0, 0)
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#endif /* __INTEL_S1000_IOMUX_H */
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