zephyr/arch/x86/Kconfig

# Kconfig - x86 general configuration options

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config X86_32
	def_bool y

config ARCH_DEFCONFIG
	string
	default "arch/x86/defconfig"

source "kernel/Kconfig"

source "misc/Kconfig"

menu "General Platform Configuration"

choice
prompt "Platform Selection"
default PLATFORM_IA32_PCI

config PLATFORM_GALILEO
	bool "Galileo Gen2"
	select HPET_TIMER
	select EOI_HANDLER_SUPPORTED
	select BOOTLOADER_UNKNOWN
	select PCI
	help
	The Intel® Galileo Gen 2 development board is a microcontroller board
	based on the Intel® Quark™ SoC X1000 application processor, a 32-bit
	Intel® Pentium® brand system on a chip (SoC). It is the first board
	based on Intel® architecture designed to be hardware and software
	pin-compatible with shields designed for the Arduino Uno* R3.

config PLATFORM_IA32_PCI
	bool "IA32 with PCI"
	select HPET_TIMER
	select EOI_HANDLER_SUPPORTED
	select BOOTLOADER_UNKNOWN
	select PCI

config PLATFORM_IA32
	bool "IA32"
	select EOI_HANDLER_SUPPORTED
	select BOOTLOADER_UNKNOWN

endchoice

choice
prompt "Intel Processor"
default CPU_MINUTEIA

config CPU_ATOM
	bool "Atom"
	select CMOV
	help
	This option signifies the use of a CPU from the Atom family.

config CPU_MINUTEIA
	bool "Minute IA"
	select CPU_FLOAT_UNSUPPORTED
	help
	This option signifies the use of a CPU from the Minute IA family.
endchoice

config CPU_MIGHT_SUPPORT_CLFLUSH
	bool
	default n
	help
	If a platform uses a processor that possibly implements CLFLUSH, change
	the default in that platform's config file.

#FIXME This option is not being used in the current code base.
config CLFLUSH_INSTRUCTION_SUPPORTED
	bool
	prompt "CLFLUSH instruction supported" if CPU_MIGHT_SUPPORT_CLFLUSH
	depends on CPU_MIGHT_SUPPORT_CLFLUSH
	default n
	help
	Only enable this if the CLFLUSH instruction is supported, so that
	an implementation of _SysCacheFlush() that uses CLFLUSH is made
	available, instead of the one using WBINVD.

menu "Platform Capabilities"
config ADVANCED_IDLE_SUPPORTED
	bool "Advanced Idle Supported"
	default n
	help
	This option signifies that the target supports the ADVANCED_IDLE
	configuration option.

config BOI_HANDLER_SUPPORTED
	bool "BOI Handler Supported"
	default n
	help
	This option signifies that the target has one or more devices whose
	driver utilizes a "beginning of interrupt" handler that gets called
	before the standard interrupt handling code. This capability
	can be used by the driver to suppress spurious interrupts generated
	by the device (or for other purposes).

config EOI_HANDLER_SUPPORTED
	bool "EOI Handler Supported"
	default n
	help
	This option signifies that the target has one or more devices whose
	driver utilizes an "end of interrupt" handler that gets called
	after the standard interrupt handling code. This capability
	can be used by the driver to tell the device that an interrupt
	has been handled (or for other purposes).

config UNALIGNED_WRITE_UNSUPPORTED
	bool "Unaligned Write Unsupported"
	default n
	help
	This option signifies that the target may not properly decode the
	IA-32 processor's byte enable (BE) lines, resulting in the inability
	to read/write unaligned quantities.

config LOCK_INSTRUCTION_UNSUPPORTED
	bool "Lock Instruction Unsupported"
	default n
	help
	This option signifies that the target lacks support for the IA-32
	LOCK prefix instruction. Code running on such targets cannot
	use the LOCK prefix to perform read-modify-write operations in an
	atomic manner; such targets must utilize other techniques to perform
	atomic operations (such as locking interrupts).

config NUM_DYNAMIC_STUBS
	int "Number of dynamic int stubs"
	default 0
	help
	This option specifies the number of interrupt handlers that can be
	installed dynamically using irq_connect().

config PIC_DISABLE
	bool "Disable PIC"
	default n
	help
	This option disables all interrupts on the PIC

endmenu

menu "Processor Capabilities"

config ISA_IA32
	bool
	default y
	help
	This option signifies the use of a CPU based on the Intel IA-32
	instruction set architecture.

config CMOV
	def_bool n
	help
	This option signifies the use of an Intel CPU that supports
	the CMOV instruction.

config CPU_FLOAT_UNSUPPORTED
	def_bool n
	select CPU_SSE_UNSUPPORTED
	help
	This option signifies the use of an Intel CPU that lacks support
	for floating point operations.

config CPU_SSE_UNSUPPORTED
	def_bool n
	help
	This option signifies the use of an Intel CPU that lacks support
	for SSEx instructions (i.e. those which pre-date Pentium III).

config CACHE_LINE_SIZE
	int "Cache line size"
	default 64 if CPU_ATOM
	default 0
	help
	Size in bytes of a CPU cache line.

endmenu

menu "Floating Point Options"
	depends on !CPU_FLOAT_UNSUPPORTED

config  FLOAT
	bool
	prompt "Floating point instructions"
	default n
	select FP_SHARING if ENHANCED_SECURITY
	help
	This option enables the use of x87 FPU and MMX instructions by
	a task or fiber.

	Disabling this option means that any task or fiber that uses a
	floating point instruction will get a fatal exception.

config  FP_SHARING
	bool
	prompt "Floating point resource sharing" if !ENHANCED_SECURITY
	depends on FLOAT
	default n
	select AUTOMATIC_FP_ENABLING if ENHANCED_SECURITY
	help
	This option allows multiple tasks and fibers to safely utilize
	floating point hardware resources. Every task or fiber that wishes
	to use floating point instructions (i.e. x87 FPU, MMX, or SSEx) must
	be created with such support already enabled, or must enable this
	support via task_float_enable() or fiber_float_enable() before
	executing these instructions.

	Enabling this option adds 108 bytes to the stack size requirement
	of each task or fiber that utilizes x87 FPU or MMX instructions,
	and adds 464 bytes to the stack size requirement of each task or
	fiber that utilizes SSEx instructions. (The stack size requirement
	of tasks and fibers that do not utilize floating point instructions
	remains unchanged.)

	Disabling this option means that only a single task or fiber may
	utilize x87 FPU, MMX, or SSEx instructions. (The stack size
	requirement of all tasks and fibers remains unchanged.)

config  AUTOMATIC_FP_ENABLING
	bool
	prompt "Automatically enable floating point resource sharing" \
	       if !ENHANCED_SECURITY
	depends on FP_SHARING
	default n
	help
	This option allows tasks and fibers to safely utilize floating
	point hardware resources without requiring them to first indicate
	their intention to do so. The system automatically detects when
	a task or fiber that does not currently have floating point support
	enabled uses a floating point instruction, and automatically executes
	task_float_enable() or fiber_float_enable() on its behalf. The
	task or fiber is enabled for using x87 FPU, MMX, or SSEx instructions
	if SSE is configured, otherwise it is enabled for using x87 FPU or
	MMX instructions only.

config  SSE
	bool
	prompt "SSEx instructions"
	depends on FLOAT && !CPU_SSE_UNSUPPORTED
	default n
	help
	This option enables the use of SSEx instructions by a task or fiber.

	Disabling this option means that no task or fiber may use SSEx
	instructions; any such use will result in undefined behavior.

config SSE_FP_MATH
	bool
	prompt "Compiler-generated SSEx instructions" if FP_SHARING
	depends on SSE
	default n if FP_SHARING
	default y if !FP_SHARING
	help
	This option allows the compiler to generate SSEx instructions for
	performing floating point math. This can greatly improve performance
	when exactly the same operations are to be performed on multiple
	data objects; however, it can also significantly reduce performance
	when pre-emptive task switches occur because of the larger register
	set that must be saved and restored.

	Disabling this option means that the compiler utilizes only the
	x87 instruction set for floating point operations.

config XIP
	default n

endmenu


source "arch/x86/core/Kconfig"

endmenu

if PLATFORM_IA32
source "arch/x86/platforms/ia32/Kconfig"
endif

if PLATFORM_IA32_PCI
source "arch/x86/platforms/ia32_pci/Kconfig"
endif

if PLATFORM_GALILEO
source "arch/x86/platforms/galileo/Kconfig"
endif

source "drivers/Kconfig"

source "net/Kconfig"