29 lines
522 B
Plaintext
29 lines
522 B
Plaintext
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/*
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* Copyright (c) 2023 STMicroelectronics
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*
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* SPDX-License-Identifier: Apache-2.0
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*/
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#include <mem.h>
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#include <st/u5/stm32u5a9.dtsi>
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/ {
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sram0: memory@20000000 {
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/* SRAM1 + SRAM2 + SRAM3 + SRAM5 */
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/* 768K + 64K + 832K + 832K */
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reg = <0x20000000 DT_SIZE_K(2496)>;
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};
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sram1: memory@28000000 {
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/* SRAM4, low-power background autonomous mode */
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reg = <0x28000000 DT_SIZE_K(16)>;
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};
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soc {
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flash-controller@40022000 {
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flash0: flash@8000000 {
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reg = <0x08000000 DT_SIZE_M(4)>;
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};
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};
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};
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};
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