2015-07-21 23:12:17 +08:00
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/*
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* Copyright (c) 2015 Intel Corporation.
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*
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2017-01-19 09:01:01 +08:00
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* SPDX-License-Identifier: Apache-2.0
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2015-07-21 23:12:17 +08:00
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*/
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2016-11-15 19:39:35 +08:00
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#ifndef _GPIO_DW_H_
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#define _GPIO_DW_H_
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2015-07-21 23:12:17 +08:00
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#include <stdint.h>
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#include <gpio.h>
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2015-12-05 22:27:59 +08:00
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#include "gpio_dw_registers.h"
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2015-07-21 23:12:17 +08:00
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2015-08-25 22:31:48 +08:00
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#ifdef CONFIG_PCI
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#include <pci/pci.h>
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#include <pci/pci_mgr.h>
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#endif /* CONFIG_PCI */
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2016-01-23 01:38:49 +08:00
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#ifdef __cplusplus
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extern "C" {
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#endif
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2015-07-21 23:12:17 +08:00
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typedef void (*gpio_config_irq_t)(struct device *port);
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2015-11-02 07:13:41 +08:00
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struct gpio_dw_config {
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2015-07-21 23:12:17 +08:00
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uint32_t bits;
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gpio: For ARC EM Starterkit, a 4-port GPIO implementation is being added
The file gpio_dw_registers.h already had the 4-port GPIO
registers defined, yet the gpio_dw.c implementation didn't
support it properly. There are 4 ports here, not 2, and only
PORTA can support interrupts and debounce.
On the em_starterkit board, for example, PORTA
has 3 bits for buttons: A, L and R. The other 3 ports should not
be used with interrupts & debounce.
I've re-worked this file to derive the port number from the
base address given. The lower 6 bits are divided by 12 to
derive the port number. From this, the registers EXT_PORTA,
EXT_PORTB, EXT_PORTC or EXT_PORTD can be read.
Also, for those ports that don't support interrupts,
set irq_num to 0, and that code will be avoided. I've verified
that I can access GPIO now correctly on the EM Starterkit. The
em_starterkit board support will be submitted soon but I'm
staging in this change first.
Change-Id: I98dbe083e03e046b40e07b4b14a99a39a6d0f0be
Signed-off-by: Chuck Jordan <cjordan@synopsys.com>
2016-05-17 12:55:01 +08:00
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uint32_t irq_num; /* set to 0 if GPIO port cannot interrupt */
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2015-07-21 23:12:17 +08:00
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gpio_config_irq_t config_func;
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2015-09-29 06:15:45 +08:00
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#ifdef CONFIG_GPIO_DW_SHARED_IRQ
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char *shared_irq_dev_name;
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#endif /* CONFIG_GPIO_DW_SHARED_IRQ */
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2015-12-01 23:00:39 +08:00
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#ifdef CONFIG_GPIO_DW_CLOCK_GATE
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void *clock_data;
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#endif
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2015-07-21 23:12:17 +08:00
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};
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2015-11-02 07:13:41 +08:00
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struct gpio_dw_runtime {
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2016-10-11 06:20:26 +08:00
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uint32_t base_addr;
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#ifdef CONFIG_PCI
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struct pci_dev_info pci_dev;
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#endif /* CONFIG_PCI */
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2015-12-01 23:00:39 +08:00
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#ifdef CONFIG_GPIO_DW_CLOCK_GATE
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struct device *clock;
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#endif
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2016-03-23 19:01:06 +08:00
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sys_slist_t callbacks;
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2016-09-12 00:17:19 +08:00
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#ifdef CONFIG_DEVICE_POWER_MANAGEMENT
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uint32_t device_power_state;
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#endif
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2015-07-21 23:12:17 +08:00
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};
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2016-01-23 01:38:49 +08:00
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#ifdef __cplusplus
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}
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#endif
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2016-11-15 19:39:35 +08:00
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#endif /* _GPIO_DW_H_ */
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