2018-07-13 05:28:58 +08:00
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/*
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* Copyright (c) 2018 Intel Corporation
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*
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* SPDX-License-Identifier: Apache-2.0
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*/
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/dts-v1/;
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2018-09-15 12:21:56 +08:00
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#include <mem.h>
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2020-07-23 01:11:56 +08:00
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#define DT_DRAM_SIZE DT_SIZE_M(2048)
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2018-07-13 05:28:58 +08:00
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#include <apollo_lake.dtsi>
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/ {
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model = "up_squared";
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2021-02-12 15:49:52 +08:00
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compatible = "up_board,up_squared";
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2018-07-13 05:28:58 +08:00
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2021-04-21 00:53:04 +08:00
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aliases {
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i2c-0 = &i2c0;
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i2c-1 = &i2c1;
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};
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2018-07-13 05:28:58 +08:00
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chosen {
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2020-07-23 01:11:56 +08:00
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zephyr,sram = &dram0;
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2018-07-13 05:28:58 +08:00
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zephyr,console = &uart0;
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2018-11-27 19:11:04 +08:00
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zephyr,shell-uart = &uart0;
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2018-07-13 05:28:58 +08:00
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zephyr,bt-uart = &uart1;
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zephyr,uart-pipe = &uart1;
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zephyr,bt-mon-uart = &uart1;
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};
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};
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