2015-12-17 13:03:40 +08:00
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/*
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* Copyright (c) 2011-2015, Wind River Systems, Inc.
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*
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2017-01-19 09:01:01 +08:00
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* SPDX-License-Identifier: Apache-2.0
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2015-12-17 13:03:40 +08:00
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*/
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/**
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* @file
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* @brief System/hardware module for the ia32 platform
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*
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* This module provides routines to initialize and support board-level hardware
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* for the ia32 platform.
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*/
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2016-12-23 21:35:34 +08:00
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#include <kernel.h>
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2015-12-17 21:54:35 +08:00
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#include "soc.h"
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2019-06-26 03:54:01 +08:00
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#include <drivers/uart.h>
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2015-12-17 13:03:40 +08:00
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#include <device.h>
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#include <init.h>
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2018-04-19 17:15:54 +08:00
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#ifdef CONFIG_X86_MMU
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/* loapic */
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MMU_BOOT_REGION(CONFIG_LOAPIC_BASE_ADDRESS, 4*1024, MMU_ENTRY_WRITE);
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/*ioapic */
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2018-11-13 22:15:23 +08:00
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MMU_BOOT_REGION(DT_IOAPIC_BASE_ADDRESS, 1024*1024, MMU_ENTRY_WRITE);
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2018-04-19 17:15:54 +08:00
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/* peripherals */
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MMU_BOOT_REGION(0xB0000000, 128*1024, MMU_ENTRY_WRITE);
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/* SCSS system control subsystem */
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MMU_BOOT_REGION(0xB0800000, 16*1024, MMU_ENTRY_WRITE);
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/* DMA */
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MMU_BOOT_REGION(0xB0700000, 4*1024, MMU_ENTRY_WRITE);
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/* USB */
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MMU_BOOT_REGION(0xB0500000, 256*1024, MMU_ENTRY_WRITE);
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#ifdef CONFIG_HPET_TIMER
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MMU_BOOT_REGION(CONFIG_HPET_TIMER_BASE_ADDRESS, KB(4), MMU_ENTRY_WRITE);
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#endif /* CONFIG_HPET_TIMER */
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#endif /* CONFIG_X86_MMU */
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