14 lines
369 B
Plaintext
14 lines
369 B
Plaintext
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/*
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* Copyright (c) 2021 Cypress Semiconductor Corporation (an Infineon company) or
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* an affiliate of Cypress Semiconductor Corporation
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*
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* SPDX-License-Identifier: Apache-2.0
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*/
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/* Cortex-M0+ application ram image area */
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SECTION_PROLOGUE(.ram_m0p_image,(NOLOAD),)
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{
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. = CONFIG_SOC_PSOC6_CM0P_IMAGE_RAM_SIZE;
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} GROUP_DATA_LINK_IN(RAMABLE_REGION, RAMABLE_REGION)
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