zephyr/arch/riscv32/soc/riscv-privilege/Kconfig.defconfig

# Kconfig - riscv SOC family supporting the riscv privileged architecture spec
#
# Copyright (c) 2017 Jean-Paul Etienne <fractalclone@gmail.com>
#
# SPDX-License-Identifier: Apache-2.0
#

config SOC_FAMILY_RISCV_PRIVILEGE
	bool
	# omit prompt to signify a "hidden" option
	default n

config SOC_FAMILY
	string
	default "riscv-privilege"
	depends on SOC_FAMILY_RISCV_PRIVILEGE

config RISCV_HAS_PLIC
	bool "Does the SOC provide support for a Platform Level Interrupt Controller"
	default n
	depends on SOC_FAMILY_RISCV_PRIVILEGE
	help
	Does the SOC provide support for a Platform Level Interrupt Controller

source "arch/riscv32/soc/riscv-privilege/*/Kconfig.defconfig.series"
riscv32: added the riscv-privilege SOC_FAMILY added the riscv-privilege SOC_FAMILY, under which all riscv SOCs supporting the riscv privilege architecture specifcation shall reside. These SOCs shall notably have a common base for handling IRQs. Moved riscv32-qemu under the riscv-privilege SOC_FAMILY Change-Id: I5372cb38e3eaed78886f22b212ab4f881ef30b3f Signed-off-by: Jean-Paul Etienne <fractalclone@gmail.com> 2017-03-15 05:12:24 +08:00			`# Kconfig - riscv SOC family supporting the riscv privileged architecture spec`
			`#`
			`# Copyright (c) 2017 Jean-Paul Etienne <fractalclone@gmail.com>`
			`#`
			`# SPDX-License-Identifier: Apache-2.0`
			`#`

			`config SOC_FAMILY_RISCV_PRIVILEGE`
			`bool`
			`# omit prompt to signify a "hidden" option`
			`default n`

			`config SOC_FAMILY`
			`string`
			`default "riscv-privilege"`
			`depends on SOC_FAMILY_RISCV_PRIVILEGE`

riscv32: riscv-privilege: Platform-Level Interrupt Controller support Updated the riscv-privilege SOC family to account for SOCs supporting a Platform-level Interrupt Controller (PLIC) as specified by the riscv privilege architecture. riscv-privilege SOCs supporting a PLIC have to implement the following list of APIs: void riscv_plic_irq_enable(uint32_t irq); void riscv_plic_irq_disable(uint32_t irq); int riscv_plic_irq_is_enabled(uint32_t irq); void riscv_plic_set_priority(uint32_t irq, uint32_t priority); int riscv_plic_get_irq(void); Change-Id: I0228574967348d572afc98a79257c697efc4309e Signed-off-by: Jean-Paul Etienne <fractalclone@gmail.com> 2017-03-15 05:13:58 +08:00			`config RISCV_HAS_PLIC`
			`bool "Does the SOC provide support for a Platform Level Interrupt Controller"`
			`default n`
			`depends on SOC_FAMILY_RISCV_PRIVILEGE`
			`help`
			`Does the SOC provide support for a Platform Level Interrupt Controller`

riscv32: added the riscv-privilege SOC_FAMILY added the riscv-privilege SOC_FAMILY, under which all riscv SOCs supporting the riscv privilege architecture specifcation shall reside. These SOCs shall notably have a common base for handling IRQs. Moved riscv32-qemu under the riscv-privilege SOC_FAMILY Change-Id: I5372cb38e3eaed78886f22b212ab4f881ef30b3f Signed-off-by: Jean-Paul Etienne <fractalclone@gmail.com> 2017-03-15 05:12:24 +08:00			`source "arch/riscv32/soc/riscv-privilege/*/Kconfig.defconfig.series"`