zephyr/tests/arch/arm/arm_irq_vector_table/testcase.yaml

tests:
  arch.interrupt.arm.irq_vector_table:
    filter: CONFIG_ARMV6_M_ARMV8_M_BASELINE or CONFIG_ARMV7_M_ARMV8_M_MAINLINE
    tags: arm interrupt vector_table
    arch_allow: arm
tests: samples: convert testcase files to yaml This will prepare test cases and samples with metadata and information that will be consumed by the sanitycheck script which will be changed to parse YAML files instead of ini. Signed-off-by: Anas Nashif <anas.nashif@intel.com> 2017-04-05 11:11:22 +08:00			`tests:`
tests: updated names for the arch interrupt tests Test case arch.interrupt have same test case name for different architectures. To get rid of it, I decided to change test cases names. Signed-off-by: Maksim Masalski <maksim.masalski@intel.com> 2019-10-22 14:32:33 +08:00			`arch.interrupt.arm.irq_vector_table:`
tests: arch: arm_irq_vector_table: enable test for ARMv6-M CPUs This commit enables running the test in CI for Cortex-M Baseline architecture. As STIR register is not present in Baseline cores, we need a minor modification in the test code so it uses NVIC intrisics instead of setting the STIR for ARMv6-M. Signed-off-by: Ioannis Glaropoulos <Ioannis.Glaropoulos@nordicsemi.no> 2019-10-16 20:12:25 +08:00			`filter: CONFIG_ARMV6_M_ARMV8_M_BASELINE or CONFIG_ARMV7_M_ARMV8_M_MAINLINE`
tests: classify tests Give test names that follow <component>.<subcomponent>. Also, improve tags. Signed-off-by: Anas Nashif <anas.nashif@intel.com> 2018-03-31 21:13:15 +08:00			`tags: arm interrupt vector_table`
sanitycheck: inclusive language change whitelist -> allow. Signed-off-by: Anas Nashif <anas.nashif@intel.com> 2020-08-26 23:28:25 +08:00			`arch_allow: arm`