2016-05-21 11:56:37 +08:00
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# Copyright (c) 2014 Wind River Systems, Inc.
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arch: arc: refactor the soc part of em_starterkit
The original em7d, em9d and em11d are different configurations of
em_starterkit. They have the same peripherals, e.g. uart, spi, gpio
, ddr. The differences of them are in arc core configurations, interrupt
number assignment.
So em7d, em9d and em11d can be viewed in the same SoC family or SoC
series.
Referring other arch's implementation, this commit merges em7d, em9d
and em11d into the same SoC, named snps_emsk. This will eliminate
unnecessary duplication and make it easier for future maintainment.
Signed-off-by: Wayne Ren <wei.ren@synopsys.com>
2018-04-28 10:10:15 +08:00
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# Copyright (c) 2018 Synopsys, Inc. All rights reserved.
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2017-01-19 09:01:01 +08:00
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# SPDX-License-Identifier: Apache-2.0
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2016-05-21 11:56:37 +08:00
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arch: arc: refactor the soc part of em_starterkit
The original em7d, em9d and em11d are different configurations of
em_starterkit. They have the same peripherals, e.g. uart, spi, gpio
, ddr. The differences of them are in arc core configurations, interrupt
number assignment.
So em7d, em9d and em11d can be viewed in the same SoC family or SoC
series.
Referring other arch's implementation, this commit merges em7d, em9d
and em11d into the same SoC, named snps_emsk. This will eliminate
unnecessary duplication and make it easier for future maintainment.
Signed-off-by: Wayne Ren <wei.ren@synopsys.com>
2018-04-28 10:10:15 +08:00
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if SOC_EMSK_EM9D
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2016-05-21 11:56:37 +08:00
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arch: arc: refactor the soc part of em_starterkit
The original em7d, em9d and em11d are different configurations of
em_starterkit. They have the same peripherals, e.g. uart, spi, gpio
, ddr. The differences of them are in arc core configurations, interrupt
number assignment.
So em7d, em9d and em11d can be viewed in the same SoC family or SoC
series.
Referring other arch's implementation, this commit merges em7d, em9d
and em11d into the same SoC, named snps_emsk. This will eliminate
unnecessary duplication and make it easier for future maintainment.
Signed-off-by: Wayne Ren <wei.ren@synopsys.com>
2018-04-28 10:10:15 +08:00
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config CPU_EM4_FPUS
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2019-10-25 11:00:41 +08:00
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default y
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2016-05-21 11:56:37 +08:00
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config NUM_IRQ_PRIO_LEVELS
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# This processor supports 4 priority levels:
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# 0 for Fast Interrupts (FIRQs) and 1-3 for Regular Interrupts (IRQs).
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2017-07-11 10:39:54 +08:00
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default 4
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2016-05-21 11:56:37 +08:00
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2016-05-25 07:17:13 +08:00
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config NUM_IRQS
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2016-05-21 11:56:37 +08:00
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# must be > the highest interrupt number used
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2017-06-15 17:18:04 +08:00
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default 38 if BOARD_EM_STARTERKIT_R23
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default 36 if BOARD_EM_STARTERKIT_R22
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2016-05-21 11:56:37 +08:00
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2016-10-08 01:29:11 +08:00
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config RGF_NUM_BANKS
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default 2
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2016-05-21 11:56:37 +08:00
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config SYS_CLOCK_HW_CYCLES_PER_SEC
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default 20000000
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config HARVARD
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2018-11-14 00:15:49 +08:00
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default y
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2016-05-21 11:56:37 +08:00
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2019-11-01 17:24:07 +08:00
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endif # SOC_EMSK_EM9D
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