2019-04-06 21:08:09 +08:00
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# SPDX-License-Identifier: Apache-2.0
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2021-08-05 05:41:58 +08:00
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zephyr_library()
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zephyr_library_sources_ifdef(CONFIG_CLOCK_CONTROL_BEETLE beetle_clock_control.c)
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zephyr_library_sources_ifdef(CONFIG_CLOCK_CONTROL_ESP32 clock_control_esp32.c)
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zephyr_library_sources_ifdef(CONFIG_CLOCK_CONTROL_LITEX clock_control_litex.c)
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zephyr_library_sources_ifdef(CONFIG_CLOCK_CONTROL_LPC11U6X clock_control_lpc11u6x.c)
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zephyr_library_sources_ifdef(CONFIG_CLOCK_CONTROL_MCHP_XEC clock_control_mchp_xec.c)
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zephyr_library_sources_ifdef(CONFIG_CLOCK_CONTROL_MCUX_CCM clock_control_mcux_ccm.c)
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zephyr_library_sources_ifdef(CONFIG_CLOCK_CONTROL_MCUX_CCM_REV2 clock_control_mcux_ccm_rev2.c)
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zephyr_library_sources_ifdef(CONFIG_CLOCK_CONTROL_MCUX_MCG clock_control_mcux_mcg.c)
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zephyr_library_sources_ifdef(CONFIG_CLOCK_CONTROL_MCUX_PCC clock_control_mcux_pcc.c)
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zephyr_library_sources_ifdef(CONFIG_CLOCK_CONTROL_MCUX_SCG clock_control_mcux_scg.c)
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zephyr_library_sources_ifdef(CONFIG_CLOCK_CONTROL_MCUX_SIM clock_control_mcux_sim.c)
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zephyr_library_sources_ifdef(CONFIG_CLOCK_CONTROL_MCUX_SYSCON clock_control_mcux_syscon.c)
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zephyr_library_sources_ifdef(CONFIG_CLOCK_CONTROL_NPCX clock_control_npcx.c)
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zephyr_library_sources_ifdef(CONFIG_CLOCK_CONTROL_NRF clock_control_nrf.c)
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2020-12-14 20:46:35 +08:00
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if(CONFIG_CLOCK_CONTROL_NRF_K32SRC_RC_CALIBRATION AND NOT CONFIG_CLOCK_CONTROL_NRF_FORCE_ALT)
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2021-08-05 05:41:58 +08:00
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zephyr_library_sources(nrf_clock_calibration.c)
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2020-12-14 20:46:35 +08:00
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endif()
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2021-08-05 05:41:58 +08:00
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zephyr_library_sources_ifdef(CONFIG_CLOCK_CONTROL_RCAR_CPG_MSSR clock_control_rcar_cpg_mssr.c)
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zephyr_library_sources_ifdef(CONFIG_CLOCK_CONTROL_RV32M1_PCC clock_control_rv32m1_pcc.c)
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2017-10-27 21:43:34 +08:00
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if(CONFIG_CLOCK_CONTROL_STM32_CUBE)
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2019-04-01 19:24:18 +08:00
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if(CONFIG_SOC_SERIES_STM32MP1X)
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2021-08-05 05:41:58 +08:00
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zephyr_library_sources(clock_stm32_ll_mp1.c)
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2019-07-01 20:12:48 +08:00
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elseif(CONFIG_SOC_SERIES_STM32H7X)
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2021-08-05 05:41:58 +08:00
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zephyr_library_sources(clock_stm32_ll_h7.c)
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2021-06-25 21:54:59 +08:00
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elseif(CONFIG_SOC_SERIES_STM32U5X)
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2021-08-05 05:41:58 +08:00
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zephyr_library_sources(clock_stm32_ll_u5.c)
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2019-04-01 19:24:18 +08:00
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else()
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2021-08-05 05:41:58 +08:00
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zephyr_library_sources(clock_stm32_ll_common.c)
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zephyr_library_sources_ifdef(CONFIG_SOC_SERIES_STM32F0X clock_stm32f0_f3.c)
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zephyr_library_sources_ifdef(CONFIG_SOC_SERIES_STM32F1X clock_stm32f1.c)
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zephyr_library_sources_ifdef(CONFIG_SOC_SERIES_STM32F2X clock_stm32f2_f4_f7.c)
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zephyr_library_sources_ifdef(CONFIG_SOC_SERIES_STM32F3X clock_stm32f0_f3.c)
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zephyr_library_sources_ifdef(CONFIG_SOC_SERIES_STM32F4X clock_stm32f2_f4_f7.c)
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zephyr_library_sources_ifdef(CONFIG_SOC_SERIES_STM32F7X clock_stm32f2_f4_f7.c)
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zephyr_library_sources_ifdef(CONFIG_SOC_SERIES_STM32G0X clock_stm32g0.c)
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zephyr_library_sources_ifdef(CONFIG_SOC_SERIES_STM32G4X clock_stm32g4.c)
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zephyr_library_sources_ifdef(CONFIG_SOC_SERIES_STM32L0X clock_stm32l0_l1.c)
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zephyr_library_sources_ifdef(CONFIG_SOC_SERIES_STM32L1X clock_stm32l0_l1.c)
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zephyr_library_sources_ifdef(CONFIG_SOC_SERIES_STM32L4X clock_stm32l4_l5_wb_wl.c)
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zephyr_library_sources_ifdef(CONFIG_SOC_SERIES_STM32L5X clock_stm32l4_l5_wb_wl.c)
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zephyr_library_sources_ifdef(CONFIG_SOC_SERIES_STM32WBX clock_stm32l4_l5_wb_wl.c)
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zephyr_library_sources_ifdef(CONFIG_SOC_SERIES_STM32WLX clock_stm32l4_l5_wb_wl.c)
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2017-10-27 21:43:34 +08:00
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endif()
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2019-04-01 19:24:18 +08:00
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endif()
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