20 lines
369 B
YAML
20 lines
369 B
YAML
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# Copyright (c) 2024 Renesas Electronics Corporation
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# SPDX-License-Identifier: Apache-2.0
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description: Renesas RA Clock Generation Circuit PLL Clock out line
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compatible: "renesas,ra-cgc-pll-out"
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include: [clock-controller.yaml, base.yaml]
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properties:
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div:
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required: true
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type: int
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freq:
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required: true
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type: int
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"#clock-cells":
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const: 0
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