zephyr/dts/bindings/clock/renesas,ra-cgc-pclk.yaml

# Copyright (c) 2024 Renesas Electronics Corporation
# SPDX-License-Identifier: Apache-2.0

description: Renesas RA Clock Control Peripheral Clock

compatible: "renesas,ra-cgc-pclk"

include: [clock-controller.yaml, base.yaml]

properties:
  div:
    type: int
    required: true
    description: Prescale divider to calculate the subclock frequency from the
                 system clock frequency.

  "#clock-cells":
    const: 2

clock-cells:
  - mstp
  - stop_bit
soc: renesas: ra: Add initial support for RA8M1 SOC series Add minimal support for RA8M1 SOC series. Signed-off-by: Duy Nguyen <duy.nguyen.xa@renesas.com> Signed-off-by: Quy Tran <quy.tran.pz@renesas.com> 2024-01-11 11:53:22 +08:00			`# Copyright (c) 2024 Renesas Electronics Corporation`
			`# SPDX-License-Identifier: Apache-2.0`

dts: bindings: clock: Change clock control binding for Renesas RA Background of this modification is to make clock control driver code provided by Renesas vendor to support for Renesas MCU on Zephyr. Signed-off-by: Quy Tran <quy.tran.pz@renesas.com> 2024-06-20 17:49:31 +08:00			`description: Renesas RA Clock Control Peripheral Clock`
soc: renesas: ra: Add initial support for RA8M1 SOC series Add minimal support for RA8M1 SOC series. Signed-off-by: Duy Nguyen <duy.nguyen.xa@renesas.com> Signed-off-by: Quy Tran <quy.tran.pz@renesas.com> 2024-01-11 11:53:22 +08:00
dts: bindings: clock: Change clock control binding for Renesas RA Background of this modification is to make clock control driver code provided by Renesas vendor to support for Renesas MCU on Zephyr. Signed-off-by: Quy Tran <quy.tran.pz@renesas.com> 2024-06-20 17:49:31 +08:00			`compatible: "renesas,ra-cgc-pclk"`
soc: renesas: ra: Add initial support for RA8M1 SOC series Add minimal support for RA8M1 SOC series. Signed-off-by: Duy Nguyen <duy.nguyen.xa@renesas.com> Signed-off-by: Quy Tran <quy.tran.pz@renesas.com> 2024-01-11 11:53:22 +08:00
			`include: [clock-controller.yaml, base.yaml]`

			`properties:`
dts: renesas_ra: Change to describe the division ratio in a numeric Move the process of replacing numerical values with macros to the header, and set the division ratio in a numeric without using macros in the device tree. Change `clk-div` defined in `renesas,ra-cgc-pclk.yaml` to `div`. Signed-off-by: TOKITA Hiroshi <tokita.hiroshi@gmail.com> 2024-09-12 22:15:27 +08:00			`div:`
soc: renesas: ra: Add initial support for RA8M1 SOC series Add minimal support for RA8M1 SOC series. Signed-off-by: Duy Nguyen <duy.nguyen.xa@renesas.com> Signed-off-by: Quy Tran <quy.tran.pz@renesas.com> 2024-01-11 11:53:22 +08:00			`type: int`
			`required: true`
			`description: Prescale divider to calculate the subclock frequency from the`
			`system clock frequency.`

			`"#clock-cells":`
driver: clock: Update clock control driver for RA8 This update is to support clock API for RA8 Move the clock initialize function into clock driver Peripheral clock now has 2 more property in clock cell for enable and disable clock to peripheral module Signed-off-by: Duy Phuong Hoang. Nguyen <duy.nguyen.xa@renesas.com> 2024-06-18 11:24:42 +08:00			`const: 2`

			`clock-cells:`
			`- mstp`
			`- stop_bit`