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zephyr/arch/arm/soc/st_stm32/stm32l4/Kconfig.defconfig.stm32l476xx

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stm32l4: add initial soc support for stm32l4 Add the initial SoC support for the STM32L4XX family. The code was tested on STM32L476RG, but should work on any STM32L4XX currently available. This implementation was inspired by the stm32f1x implementation. Change-Id: Id6670bce0c423617284e8467a9c461531f948e0f Signed-off-by: Fabien Parent <fparent@baylibre.com> Signed-off-by: Kumar Gala <kumar.gala@linaro.org> Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
2016-10-03 21:51:32 +08:00
# Kconfig - ST Microelectronics STM32L476RG MCU
#
# Copyright (c) 2016 Open-RnD Sp. z o.o.
# Copyright (c) 2016 BayLibre, SAS
#
license: Replace Apache boilerplate with SPDX tag Replace the existing Apache 2.0 boilerplate header with an SPDX tag throughout the zephyr code tree. This patch was generated via a script run over the master branch. Also updated doc/porting/application.rst that had a dependency on line numbers in a literal include. Manually updated subsys/logging/sys_log.c that had a malformed header in the original file. Also cleanup several cases that already had a SPDX tag and we either got a duplicate or missed updating. Jira: ZEP-1457 Change-Id: I6131a1d4ee0e58f5b938300c2d2fc77d2e69572c Signed-off-by: David B. Kinder <david.b.kinder@intel.com> Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
2017-01-19 09:01:01 +08:00
# SPDX-License-Identifier: Apache-2.0
stm32l4: add initial soc support for stm32l4 Add the initial SoC support for the STM32L4XX family. The code was tested on STM32L476RG, but should work on any STM32L4XX currently available. This implementation was inspired by the stm32f1x implementation. Change-Id: Id6670bce0c423617284e8467a9c461531f948e0f Signed-off-by: Fabien Parent <fparent@baylibre.com> Signed-off-by: Kumar Gala <kumar.gala@linaro.org> Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
2016-10-03 21:51:32 +08:00
#
soc: stm32l476rg: rename SOC config flag Rename SOC_STM32L476XX to SOC_STM32L476XG to keep flash size information. Aim is to be able to distinguish flash size variants of the SoC when needed (for instance in dts/arm/st/mem.h file) Change-Id: I834bb5b83c24c39e90c0492a2b22a7c7802de361 Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
2017-05-10 19:48:45 +08:00
if SOC_STM32L476XG
stm32l4: add initial soc support for stm32l4 Add the initial SoC support for the STM32L4XX family. The code was tested on STM32L476RG, but should work on any STM32L4XX currently available. This implementation was inspired by the stm32f1x implementation. Change-Id: Id6670bce0c423617284e8467a9c461531f948e0f Signed-off-by: Fabien Parent <fparent@baylibre.com> Signed-off-by: Kumar Gala <kumar.gala@linaro.org> Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
2016-10-03 21:51:32 +08:00
config SOC
string
soc: defconfig: Consistently quote string defaults In preparation for introducing a warning. Unquoted string defaults work through a quirk of Kconfig (undefined symbols get their name as their string value), but look confusing. It's done inconsistently now too. Suggested by Kumar Gala. Signed-off-by: Ulf Magnusson <Ulf.Magnusson@nordicsemi.no>
2018-05-26 03:19:21 +08:00
default "stm32l476xx"
stm32l4: add initial soc support for stm32l4 Add the initial SoC support for the STM32L4XX family. The code was tested on STM32L476RG, but should work on any STM32L4XX currently available. This implementation was inspired by the stm32f1x implementation. Change-Id: Id6670bce0c423617284e8467a9c461531f948e0f Signed-off-by: Fabien Parent <fparent@baylibre.com> Signed-off-by: Kumar Gala <kumar.gala@linaro.org> Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
2016-10-03 21:51:32 +08:00
config NUM_IRQS
int
default 82
boards: stm32l4: Clean up driver generic flags Clean up driver generic flags from boards' _defconfig files Signed-off-by: Yannis Damigos <giannis.damigos@gmail.com>
2017-12-29 03:01:28 +08:00
if GPIO_STM32
config GPIO_STM32_PORTD
def_bool y
config GPIO_STM32_PORTE
default y
config GPIO_STM32_PORTF
default y
config GPIO_STM32_PORTG
default y
config GPIO_STM32_PORTH
default y
endif # GPIO_STM32
soc: stm32l476rg: rename SOC config flag Rename SOC_STM32L476XX to SOC_STM32L476XG to keep flash size information. Aim is to be able to distinguish flash size variants of the SoC when needed (for instance in dts/arm/st/mem.h file) Change-Id: I834bb5b83c24c39e90c0492a2b22a7c7802de361 Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
2017-05-10 19:48:45 +08:00
endif # SOC_STM32L476XG