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zephyr/drivers/clock_control/Kconfig

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clock: add Quark SE clock control Quark SE provides various clock controllers through its SCSS block. Peripheral, external, sensor, and others. This current drivers provides only the clock gating capability, for peripheral, external and sensor. But it could support divider and more other features once defined in the generic API. Note: such clock has _nothing_ to do with a Real Time Clock (RTC). An RTC provide clock timing like a watch would do. Here the clock controller is about circuit clocking. Change-Id: I1a365ae730dfc6be7686271f7fbb693e64a6ff6f Signed-off-by: Anas Nashif <anas.nashif@intel.com> Signed-off-by: Tomasz Bursztyka <tomasz.bursztyka@linux.intel.com>
2015-11-22 10:16:01 +08:00
# Kconfig - Clock controller driver configuration options
#
# Copyright (c) 2015 Intel Corporation
#
# Licensed under the Apache License, Version 2.0 (the "License");
# you may not use this file except in compliance with the License.
# You may obtain a copy of the License at
#
# http://www.apache.org/licenses/LICENSE-2.0
#
# Unless required by applicable law or agreed to in writing, software
# distributed under the License is distributed on an "AS IS" BASIS,
# WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
# See the License for the specific language governing permissions and
# limitations under the License.
#
#
# Clock controller drivers
#
menuconfig CLOCK_CONTROL
bool
prompt "Hardware clock controller support"
default n
help
Enable support for hardware clock controller. Such hardware can
provide clock for other subsystem, and thus can be also used for
power efficiency by controlling their clock. Note that this has
nothing to do with RTC.
clock_control/Kconfig: move quark_se entries to separate file Move quark_se clock control entries to separate file. This will help to keep things organized once we add more clock control drivers. Change-Id: Id8f4a94189ab5bbba9b6552777549cf426d79273 Origin: Original Signed-off-by: Maciej Borzecki <maciek.borzecki@gmail.com>
2016-03-06 01:05:57 +08:00
if CLOCK_CONTROL
sys_log: replace old debug macros at clock control driver Clock control drivers are now using new system log macros. also update the Kconfig variable to be a level rather than a bool. JIRA: ZEP-311 Change-Id: Ia64e79e4e083df580861f64c661f8dbaa8a3985d Signed-off-by: Genaro Saucedo Tejada <genaro.saucedo.tejada@intel.com>
2016-07-08 01:17:32 +08:00
config SYS_LOG_CLOCK_CONTROL_LEVEL
int
prompt "Hardware clock controller drivers log level"
clock: add Quark SE clock control Quark SE provides various clock controllers through its SCSS block. Peripheral, external, sensor, and others. This current drivers provides only the clock gating capability, for peripheral, external and sensor. But it could support divider and more other features once defined in the generic API. Note: such clock has _nothing_ to do with a Real Time Clock (RTC). An RTC provide clock timing like a watch would do. Here the clock controller is about circuit clocking. Change-Id: I1a365ae730dfc6be7686271f7fbb693e64a6ff6f Signed-off-by: Anas Nashif <anas.nashif@intel.com> Signed-off-by: Tomasz Bursztyka <tomasz.bursztyka@linux.intel.com>
2015-11-22 10:16:01 +08:00
depends on CLOCK_CONTROL
sys_log: replace old debug macros at clock control driver Clock control drivers are now using new system log macros. also update the Kconfig variable to be a level rather than a bool. JIRA: ZEP-311 Change-Id: Ia64e79e4e083df580861f64c661f8dbaa8a3985d Signed-off-by: Genaro Saucedo Tejada <genaro.saucedo.tejada@intel.com>
2016-07-08 01:17:32 +08:00
default 0
help
Sets log level for clock controller drivers
Levels are:
- 0 OFF, do not write
- 1 ERROR, only write SYS_LOG_ERR
- 2 WARNING, write SYS_LOG_WRN in adition to previous level
- 3 INFO, write SYS_LOG_INF in adition to previous levels
- 4 DEBUG, write SYS_LOG_DBG in adition to previous levels
clock: add Quark SE clock control Quark SE provides various clock controllers through its SCSS block. Peripheral, external, sensor, and others. This current drivers provides only the clock gating capability, for peripheral, external and sensor. But it could support divider and more other features once defined in the generic API. Note: such clock has _nothing_ to do with a Real Time Clock (RTC). An RTC provide clock timing like a watch would do. Here the clock controller is about circuit clocking. Change-Id: I1a365ae730dfc6be7686271f7fbb693e64a6ff6f Signed-off-by: Anas Nashif <anas.nashif@intel.com> Signed-off-by: Tomasz Bursztyka <tomasz.bursztyka@linux.intel.com>
2015-11-22 10:16:01 +08:00
clock_control/Kconfig: move quark_se entries to separate file Move quark_se clock control entries to separate file. This will help to keep things organized once we add more clock control drivers. Change-Id: Id8f4a94189ab5bbba9b6552777549cf426d79273 Origin: Original Signed-off-by: Maciej Borzecki <maciek.borzecki@gmail.com>
2016-03-06 01:05:57 +08:00
source "drivers/clock_control/Kconfig.quark_se"
clock: add Quark SE clock control Quark SE provides various clock controllers through its SCSS block. Peripheral, external, sensor, and others. This current drivers provides only the clock gating capability, for peripheral, external and sensor. But it could support divider and more other features once defined in the generic API. Note: such clock has _nothing_ to do with a Real Time Clock (RTC). An RTC provide clock timing like a watch would do. Here the clock controller is about circuit clocking. Change-Id: I1a365ae730dfc6be7686271f7fbb693e64a6ff6f Signed-off-by: Anas Nashif <anas.nashif@intel.com> Signed-off-by: Tomasz Bursztyka <tomasz.bursztyka@linux.intel.com>
2015-11-22 10:16:01 +08:00
clock_control/stm32f10x: introduce driver for STM32F10x RCC The patch adds a driver for STM32F10x series RCC (Reset and Clock Control) subsystem. The module is primarily responsible for setting up of MCU's clock tree. In particular the driver sets up SYSCLK, PLL (with source configuration), AHB prescaler, and APB1/APB2 prescalers. As part of this functionality, the subsystem can enable/disable clock signal for particular peripherals, thus reducing the power consumption of the MCU. The driver implements clock control driver API. However, subsystem IDs being HW specific are exposed in driver public header that must be included by callers. The driver registers a single device using a common name STM32_CLOCK_CONTROL_NAME. The device is initialized at the PRIMARY level with priority 1. This allows the initialization to take place right after SoC initialization routine. The driver depends on selection of SOC_STM32F1X config option and is MCU specific. Change-Id: I8bea5db20726a24bce7b7ffe0b95de543240429a Origin: Original Signed-off-by: Maciej Borzecki <maciek.borzecki@gmail.com>
2016-03-03 22:33:04 +08:00
source "drivers/clock_control/Kconfig.stm32f10x"
clock_control/Kconfig: move quark_se entries to separate file Move quark_se clock control entries to separate file. This will help to keep things organized once we add more clock control drivers. Change-Id: Id8f4a94189ab5bbba9b6552777549cf426d79273 Origin: Original Signed-off-by: Maciej Borzecki <maciek.borzecki@gmail.com>
2016-03-06 01:05:57 +08:00
endif # CLOCK_CONTROL