2018-03-02 22:05:00 +08:00
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/*
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* Copyright (c) 2017 - 2018, Nordic Semiconductor ASA
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*
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* SPDX-License-Identifier: Apache-2.0
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*/
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2022-05-06 16:25:46 +08:00
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#include <zephyr/drivers/spi.h>
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#include <zephyr/pm/device.h>
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#include <zephyr/drivers/pinctrl.h>
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2022-02-24 22:40:05 +08:00
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#include <soc.h>
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2018-03-02 22:05:00 +08:00
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#include <nrfx_spi.h>
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2022-05-06 16:25:46 +08:00
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#include <zephyr/logging/log.h>
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2022-10-17 16:24:11 +08:00
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#include <zephyr/irq.h>
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2022-02-24 22:39:18 +08:00
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LOG_MODULE_REGISTER(spi_nrfx_spi, CONFIG_SPI_LOG_LEVEL);
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2018-03-02 22:05:00 +08:00
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#include "spi_context.h"
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struct spi_nrfx_data {
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struct spi_context ctx;
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2020-07-08 16:57:21 +08:00
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const struct device *dev;
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2018-03-02 22:05:00 +08:00
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size_t chunk_len;
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bool busy;
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2021-09-09 17:57:56 +08:00
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bool initialized;
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2018-03-02 22:05:00 +08:00
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};
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struct spi_nrfx_config {
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2019-06-06 22:09:21 +08:00
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nrfx_spi_t spi;
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2021-09-09 17:57:56 +08:00
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nrfx_spi_config_t def_config;
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2022-06-21 04:42:13 +08:00
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void (*irq_connect)(void);
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2022-02-24 22:40:05 +08:00
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#ifdef CONFIG_PINCTRL
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const struct pinctrl_dev_config *pcfg;
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#endif
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2018-03-02 22:05:00 +08:00
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};
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2021-09-09 17:57:56 +08:00
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static void event_handler(const nrfx_spi_evt_t *p_event, void *p_context);
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2020-05-28 00:26:57 +08:00
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static inline nrf_spi_frequency_t get_nrf_spi_frequency(uint32_t frequency)
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2018-03-02 22:05:00 +08:00
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{
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/* Get the highest supported frequency not exceeding the requested one.
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*/
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if (frequency < 250000) {
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return NRF_SPI_FREQ_125K;
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} else if (frequency < 500000) {
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return NRF_SPI_FREQ_250K;
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} else if (frequency < 1000000) {
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return NRF_SPI_FREQ_500K;
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} else if (frequency < 2000000) {
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return NRF_SPI_FREQ_1M;
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} else if (frequency < 4000000) {
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return NRF_SPI_FREQ_2M;
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} else if (frequency < 8000000) {
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return NRF_SPI_FREQ_4M;
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} else {
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return NRF_SPI_FREQ_8M;
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}
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}
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2020-05-28 00:26:57 +08:00
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static inline nrf_spi_mode_t get_nrf_spi_mode(uint16_t operation)
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2018-03-02 22:05:00 +08:00
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{
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if (SPI_MODE_GET(operation) & SPI_MODE_CPOL) {
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if (SPI_MODE_GET(operation) & SPI_MODE_CPHA) {
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return NRF_SPI_MODE_3;
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} else {
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return NRF_SPI_MODE_2;
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}
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} else {
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if (SPI_MODE_GET(operation) & SPI_MODE_CPHA) {
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return NRF_SPI_MODE_1;
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} else {
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return NRF_SPI_MODE_0;
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}
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}
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}
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2020-05-28 00:26:57 +08:00
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static inline nrf_spi_bit_order_t get_nrf_spi_bit_order(uint16_t operation)
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2018-03-02 22:05:00 +08:00
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{
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if (operation & SPI_TRANSFER_LSB) {
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return NRF_SPI_BIT_ORDER_LSB_FIRST;
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} else {
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return NRF_SPI_BIT_ORDER_MSB_FIRST;
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}
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}
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2020-05-01 02:33:38 +08:00
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static int configure(const struct device *dev,
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2018-03-02 22:05:00 +08:00
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const struct spi_config *spi_cfg)
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{
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2022-01-19 23:25:52 +08:00
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struct spi_nrfx_data *dev_data = dev->data;
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const struct spi_nrfx_config *dev_config = dev->config;
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2021-09-09 17:57:56 +08:00
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struct spi_context *ctx = &dev_data->ctx;
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nrfx_spi_config_t config;
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nrfx_err_t result;
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2018-03-02 22:05:00 +08:00
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2021-09-09 17:57:56 +08:00
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if (dev_data->initialized && spi_context_configured(ctx, spi_cfg)) {
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2018-03-02 22:05:00 +08:00
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/* Already configured. No need to do it again. */
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return 0;
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}
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2021-09-09 22:16:59 +08:00
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if (spi_cfg->operation & SPI_HALF_DUPLEX) {
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LOG_ERR("Half-duplex not supported");
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return -ENOTSUP;
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}
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2018-04-09 20:48:12 +08:00
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if (SPI_OP_MODE_GET(spi_cfg->operation) != SPI_OP_MODE_MASTER) {
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2021-09-09 17:57:56 +08:00
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LOG_ERR("Slave mode is not supported on %s", dev->name);
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2018-03-02 22:05:00 +08:00
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return -EINVAL;
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}
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if (spi_cfg->operation & SPI_MODE_LOOP) {
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2018-09-23 10:13:18 +08:00
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LOG_ERR("Loopback mode is not supported");
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2018-03-02 22:05:00 +08:00
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return -EINVAL;
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}
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2021-09-07 21:39:20 +08:00
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if (IS_ENABLED(CONFIG_SPI_EXTENDED_MODES) &&
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(spi_cfg->operation & SPI_LINES_MASK) != SPI_LINES_SINGLE) {
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2018-09-23 10:13:18 +08:00
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LOG_ERR("Only single line mode is supported");
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2018-03-02 22:05:00 +08:00
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return -EINVAL;
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}
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if (SPI_WORD_SIZE_GET(spi_cfg->operation) != 8) {
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2021-09-09 17:57:56 +08:00
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LOG_ERR("Word sizes other than 8 bits are not supported");
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2018-03-02 22:05:00 +08:00
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return -EINVAL;
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}
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if (spi_cfg->frequency < 125000) {
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2018-09-23 10:13:18 +08:00
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LOG_ERR("Frequencies lower than 125 kHz are not supported");
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2018-03-02 22:05:00 +08:00
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return -EINVAL;
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}
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2021-09-09 17:57:56 +08:00
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config = dev_config->def_config;
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config.frequency = get_nrf_spi_frequency(spi_cfg->frequency);
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config.mode = get_nrf_spi_mode(spi_cfg->operation);
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config.bit_order = get_nrf_spi_bit_order(spi_cfg->operation);
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if (dev_data->initialized) {
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nrfx_spi_uninit(&dev_config->spi);
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dev_data->initialized = false;
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}
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result = nrfx_spi_init(&dev_config->spi, &config,
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event_handler, dev_data);
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if (result != NRFX_SUCCESS) {
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LOG_ERR("Failed to initialize nrfx driver: %08x", result);
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return -EIO;
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}
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dev_data->initialized = true;
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2018-03-02 22:05:00 +08:00
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ctx->config = spi_cfg;
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return 0;
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}
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2020-05-01 02:33:38 +08:00
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static void transfer_next_chunk(const struct device *dev)
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2018-03-02 22:05:00 +08:00
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{
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2022-02-24 22:39:18 +08:00
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const struct spi_nrfx_config *dev_config = dev->config;
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2022-01-19 23:25:52 +08:00
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struct spi_nrfx_data *dev_data = dev->data;
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2018-03-02 22:05:00 +08:00
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struct spi_context *ctx = &dev_data->ctx;
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int error = 0;
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2020-09-15 16:36:38 +08:00
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size_t chunk_len = spi_context_max_continuous_chunk(ctx);
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2018-03-02 22:05:00 +08:00
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if (chunk_len > 0) {
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2018-04-13 15:42:01 +08:00
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nrfx_spi_xfer_desc_t xfer;
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2018-04-09 20:48:12 +08:00
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nrfx_err_t result;
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2018-03-02 22:05:00 +08:00
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dev_data->chunk_len = chunk_len;
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2018-04-09 20:48:12 +08:00
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xfer.p_tx_buffer = ctx->tx_buf;
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xfer.tx_length = spi_context_tx_buf_on(ctx) ? chunk_len : 0;
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xfer.p_rx_buffer = ctx->rx_buf;
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xfer.rx_length = spi_context_rx_buf_on(ctx) ? chunk_len : 0;
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2022-02-24 22:39:18 +08:00
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result = nrfx_spi_xfer(&dev_config->spi, &xfer, 0);
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2018-03-02 22:05:00 +08:00
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if (result == NRFX_SUCCESS) {
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return;
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}
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error = -EIO;
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}
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spi_context_cs_control(ctx, false);
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2018-09-23 10:13:18 +08:00
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LOG_DBG("Transaction finished with status %d", error);
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2018-03-02 22:05:00 +08:00
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2022-08-16 04:57:43 +08:00
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spi_context_complete(ctx, dev, error);
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2018-03-02 22:05:00 +08:00
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dev_data->busy = false;
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}
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2021-09-09 17:57:56 +08:00
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static void event_handler(const nrfx_spi_evt_t *p_event, void *p_context)
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{
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struct spi_nrfx_data *dev_data = p_context;
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if (p_event->type == NRFX_SPI_EVENT_DONE) {
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spi_context_update_tx(&dev_data->ctx, 1, dev_data->chunk_len);
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spi_context_update_rx(&dev_data->ctx, 1, dev_data->chunk_len);
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transfer_next_chunk(dev_data->dev);
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}
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}
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2020-05-01 02:33:38 +08:00
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static int transceive(const struct device *dev,
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2018-03-02 22:05:00 +08:00
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const struct spi_config *spi_cfg,
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const struct spi_buf_set *tx_bufs,
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2020-01-02 22:41:09 +08:00
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const struct spi_buf_set *rx_bufs,
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bool asynchronous,
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2022-08-16 04:57:43 +08:00
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spi_callback_t cb,
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void *userdata)
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2018-03-02 22:05:00 +08:00
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{
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2022-01-19 23:25:52 +08:00
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struct spi_nrfx_data *dev_data = dev->data;
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2018-03-02 22:05:00 +08:00
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int error;
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2022-08-16 04:57:43 +08:00
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spi_context_lock(&dev_data->ctx, asynchronous, cb, userdata, spi_cfg);
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2020-01-02 22:41:09 +08:00
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2018-03-02 22:05:00 +08:00
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error = configure(dev, spi_cfg);
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if (error == 0) {
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dev_data->busy = true;
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spi_context_buffers_setup(&dev_data->ctx, tx_bufs, rx_bufs, 1);
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spi_context_cs_control(&dev_data->ctx, true);
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transfer_next_chunk(dev);
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error = spi_context_wait_for_completion(&dev_data->ctx);
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}
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spi_context_release(&dev_data->ctx, error);
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return error;
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}
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2020-05-01 02:33:38 +08:00
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static int spi_nrfx_transceive(const struct device *dev,
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2018-03-02 22:05:00 +08:00
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const struct spi_config *spi_cfg,
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const struct spi_buf_set *tx_bufs,
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const struct spi_buf_set *rx_bufs)
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{
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2022-08-16 04:57:43 +08:00
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return transceive(dev, spi_cfg, tx_bufs, rx_bufs, false, NULL, NULL);
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2018-03-02 22:05:00 +08:00
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}
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#ifdef CONFIG_SPI_ASYNC
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2020-05-01 02:33:38 +08:00
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static int spi_nrfx_transceive_async(const struct device *dev,
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2018-03-02 22:05:00 +08:00
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const struct spi_config *spi_cfg,
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const struct spi_buf_set *tx_bufs,
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const struct spi_buf_set *rx_bufs,
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2022-08-16 04:57:43 +08:00
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spi_callback_t cb,
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void *userdata)
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2018-03-02 22:05:00 +08:00
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{
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2022-08-16 04:57:43 +08:00
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return transceive(dev, spi_cfg, tx_bufs, rx_bufs, true, cb, userdata);
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2018-03-02 22:05:00 +08:00
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}
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#endif /* CONFIG_SPI_ASYNC */
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2020-05-01 02:33:38 +08:00
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static int spi_nrfx_release(const struct device *dev,
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2018-03-02 22:05:00 +08:00
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const struct spi_config *spi_cfg)
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{
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2022-01-19 23:25:52 +08:00
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struct spi_nrfx_data *dev_data = dev->data;
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2018-03-02 22:05:00 +08:00
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if (!spi_context_configured(&dev_data->ctx, spi_cfg)) {
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return -EINVAL;
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}
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if (dev_data->busy) {
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return -EBUSY;
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}
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spi_context_unlock_unconditionally(&dev_data->ctx);
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return 0;
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}
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static const struct spi_driver_api spi_nrfx_driver_api = {
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.transceive = spi_nrfx_transceive,
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#ifdef CONFIG_SPI_ASYNC
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.transceive_async = spi_nrfx_transceive_async,
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#endif
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.release = spi_nrfx_release,
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};
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2020-09-02 06:31:40 +08:00
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#ifdef CONFIG_PM_DEVICE
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2021-11-02 23:19:41 +08:00
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static int spi_nrfx_pm_action(const struct device *dev,
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enum pm_device_action action)
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2019-06-06 22:09:21 +08:00
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{
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int ret = 0;
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2022-02-24 22:39:18 +08:00
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struct spi_nrfx_data *dev_data = dev->data;
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const struct spi_nrfx_config *dev_config = dev->config;
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2021-07-02 19:01:05 +08:00
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2021-07-05 21:13:40 +08:00
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switch (action) {
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case PM_DEVICE_ACTION_RESUME:
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2022-02-24 22:40:05 +08:00
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#ifdef CONFIG_PINCTRL
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ret = pinctrl_apply_state(dev_config->pcfg,
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PINCTRL_STATE_DEFAULT);
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if (ret < 0) {
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return ret;
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}
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#endif
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/* nrfx_spi_init() will be called at configuration before
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* the next transfer.
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2021-09-09 17:57:56 +08:00
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*/
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2021-07-02 19:01:05 +08:00
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break;
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2021-07-05 21:13:40 +08:00
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case PM_DEVICE_ACTION_SUSPEND:
|
2022-02-24 22:39:18 +08:00
|
|
|
if (dev_data->initialized) {
|
|
|
|
nrfx_spi_uninit(&dev_config->spi);
|
|
|
|
dev_data->initialized = false;
|
2022-01-31 11:28:52 +08:00
|
|
|
}
|
2022-02-24 22:40:05 +08:00
|
|
|
|
|
|
|
#ifdef CONFIG_PINCTRL
|
|
|
|
ret = pinctrl_apply_state(dev_config->pcfg,
|
|
|
|
PINCTRL_STATE_SLEEP);
|
|
|
|
if (ret < 0) {
|
|
|
|
return ret;
|
|
|
|
}
|
|
|
|
#endif
|
2021-07-02 19:01:05 +08:00
|
|
|
break;
|
|
|
|
|
|
|
|
default:
|
|
|
|
ret = -ENOTSUP;
|
2019-06-06 22:09:21 +08:00
|
|
|
}
|
|
|
|
|
|
|
|
return ret;
|
|
|
|
}
|
2020-09-02 06:31:40 +08:00
|
|
|
#endif /* CONFIG_PM_DEVICE */
|
2019-06-06 22:09:21 +08:00
|
|
|
|
2022-06-21 04:42:13 +08:00
|
|
|
static int spi_nrfx_init(const struct device *dev)
|
|
|
|
{
|
|
|
|
const struct spi_nrfx_config *dev_config = dev->config;
|
|
|
|
struct spi_nrfx_data *dev_data = dev->data;
|
|
|
|
int err;
|
|
|
|
|
|
|
|
#ifdef CONFIG_PINCTRL
|
|
|
|
err = pinctrl_apply_state(dev_config->pcfg, PINCTRL_STATE_DEFAULT);
|
|
|
|
if (err < 0) {
|
|
|
|
return err;
|
|
|
|
}
|
|
|
|
#endif
|
|
|
|
|
|
|
|
dev_config->irq_connect();
|
|
|
|
|
|
|
|
err = spi_context_cs_configure_all(&dev_data->ctx);
|
|
|
|
if (err < 0) {
|
|
|
|
return err;
|
|
|
|
}
|
|
|
|
|
|
|
|
spi_context_unlock_unconditionally(&dev_data->ctx);
|
|
|
|
|
|
|
|
return 0;
|
|
|
|
}
|
|
|
|
|
2020-04-17 08:59:06 +08:00
|
|
|
/*
|
|
|
|
* Current factors requiring use of DT_NODELABEL:
|
|
|
|
*
|
2022-06-21 00:02:27 +08:00
|
|
|
* - HAL design (requirement of drv_inst_idx in nrfx_spi_t)
|
|
|
|
* - Name-based HAL IRQ handlers, e.g. nrfx_spi_0_irq_handler
|
2020-04-17 08:59:06 +08:00
|
|
|
*/
|
2019-12-03 18:41:41 +08:00
|
|
|
|
2020-04-17 08:59:06 +08:00
|
|
|
#define SPI(idx) DT_NODELABEL(spi##idx)
|
|
|
|
#define SPI_PROP(idx, prop) DT_PROP(SPI(idx), prop)
|
2019-12-03 18:41:41 +08:00
|
|
|
|
|
|
|
#define SPI_NRFX_MISO_PULL(idx) \
|
2020-04-17 08:59:06 +08:00
|
|
|
(SPI_PROP(idx, miso_pull_up) \
|
|
|
|
? SPI_PROP(idx, miso_pull_down) \
|
2019-12-03 18:41:41 +08:00
|
|
|
? -1 /* invalid configuration */\
|
|
|
|
: NRF_GPIO_PIN_PULLUP \
|
2020-04-17 08:59:06 +08:00
|
|
|
: SPI_PROP(idx, miso_pull_down) \
|
2019-12-03 18:41:41 +08:00
|
|
|
? NRF_GPIO_PIN_PULLDOWN \
|
|
|
|
: NRF_GPIO_PIN_NOPULL)
|
2019-06-06 22:09:21 +08:00
|
|
|
|
2022-02-24 22:40:05 +08:00
|
|
|
#define SPI_NRFX_SPI_PIN_CFG(idx) \
|
|
|
|
COND_CODE_1(CONFIG_PINCTRL, \
|
|
|
|
(.skip_gpio_cfg = true, \
|
|
|
|
.skip_psel_cfg = true,), \
|
|
|
|
(.sck_pin = SPI_PROP(idx, sck_pin), \
|
|
|
|
.mosi_pin = DT_PROP_OR(SPI(idx), mosi_pin, \
|
|
|
|
NRFX_SPI_PIN_NOT_USED), \
|
|
|
|
.miso_pin = DT_PROP_OR(SPI(idx), miso_pin, \
|
|
|
|
NRFX_SPI_PIN_NOT_USED), \
|
|
|
|
.miso_pull = SPI_NRFX_MISO_PULL(idx),))
|
|
|
|
|
2022-06-21 04:27:32 +08:00
|
|
|
#define SPI_NRFX_SPI_DEFINE(idx) \
|
2022-03-17 22:15:09 +08:00
|
|
|
NRF_DT_CHECK_PIN_ASSIGNMENTS(SPI(idx), 1, \
|
|
|
|
sck_pin, mosi_pin, miso_pin); \
|
2022-02-24 22:40:05 +08:00
|
|
|
BUILD_ASSERT(IS_ENABLED(CONFIG_PINCTRL) || \
|
|
|
|
!(SPI_PROP(idx, miso_pull_up) && \
|
|
|
|
SPI_PROP(idx, miso_pull_down)), \
|
2019-12-03 18:41:41 +08:00
|
|
|
"SPI"#idx \
|
|
|
|
": cannot enable both pull-up and pull-down on MISO line"); \
|
2022-06-21 04:42:13 +08:00
|
|
|
static void irq_connect##idx(void) \
|
2018-10-03 20:08:07 +08:00
|
|
|
{ \
|
2020-04-17 08:59:06 +08:00
|
|
|
IRQ_CONNECT(DT_IRQN(SPI(idx)), DT_IRQ(SPI(idx), priority), \
|
2018-10-03 20:08:07 +08:00
|
|
|
nrfx_isr, nrfx_spi_##idx##_irq_handler, 0); \
|
|
|
|
} \
|
|
|
|
static struct spi_nrfx_data spi_##idx##_data = { \
|
|
|
|
SPI_CONTEXT_INIT_LOCK(spi_##idx##_data, ctx), \
|
|
|
|
SPI_CONTEXT_INIT_SYNC(spi_##idx##_data, ctx), \
|
2021-11-05 17:57:31 +08:00
|
|
|
SPI_CONTEXT_CS_GPIOS_INITIALIZE(SPI(idx), ctx) \
|
2021-09-09 17:57:56 +08:00
|
|
|
.dev = DEVICE_DT_GET(SPI(idx)), \
|
2018-10-03 20:08:07 +08:00
|
|
|
.busy = false, \
|
|
|
|
}; \
|
2022-02-24 22:40:05 +08:00
|
|
|
IF_ENABLED(CONFIG_PINCTRL, (PINCTRL_DT_DEFINE(SPI(idx)))); \
|
2019-03-13 05:15:42 +08:00
|
|
|
static const struct spi_nrfx_config spi_##idx##z_config = { \
|
2022-06-21 00:02:27 +08:00
|
|
|
.spi = { \
|
|
|
|
.p_reg = (NRF_SPI_Type *)DT_REG_ADDR(SPI(idx)), \
|
|
|
|
.drv_inst_idx = NRFX_SPI##idx##_INST_IDX, \
|
|
|
|
}, \
|
2021-09-09 17:57:56 +08:00
|
|
|
.def_config = { \
|
2022-02-24 22:40:05 +08:00
|
|
|
SPI_NRFX_SPI_PIN_CFG(idx) \
|
|
|
|
.ss_pin = NRFX_SPI_PIN_NOT_USED, \
|
2022-06-20 21:45:28 +08:00
|
|
|
.orc = SPI_PROP(idx, overrun_character), \
|
2022-02-24 22:40:05 +08:00
|
|
|
}, \
|
2022-06-21 04:42:13 +08:00
|
|
|
.irq_connect = irq_connect##idx, \
|
2022-02-24 22:40:05 +08:00
|
|
|
IF_ENABLED(CONFIG_PINCTRL, \
|
|
|
|
(.pcfg = PINCTRL_DT_DEV_CONFIG_GET(SPI(idx)),)) \
|
2018-10-03 20:08:07 +08:00
|
|
|
}; \
|
2021-10-13 18:25:06 +08:00
|
|
|
PM_DEVICE_DT_DEFINE(SPI(idx), spi_nrfx_pm_action); \
|
2020-10-29 23:28:34 +08:00
|
|
|
DEVICE_DT_DEFINE(SPI(idx), \
|
2022-06-21 04:42:13 +08:00
|
|
|
spi_nrfx_init, \
|
2022-01-17 22:11:09 +08:00
|
|
|
PM_DEVICE_DT_GET(SPI(idx)), \
|
2019-06-06 22:09:21 +08:00
|
|
|
&spi_##idx##_data, \
|
|
|
|
&spi_##idx##z_config, \
|
|
|
|
POST_KERNEL, CONFIG_SPI_INIT_PRIORITY, \
|
|
|
|
&spi_nrfx_driver_api)
|
2018-03-02 22:05:00 +08:00
|
|
|
|
|
|
|
#ifdef CONFIG_SPI_0_NRF_SPI
|
2022-06-21 04:27:32 +08:00
|
|
|
SPI_NRFX_SPI_DEFINE(0);
|
2018-03-02 22:05:00 +08:00
|
|
|
#endif
|
|
|
|
|
|
|
|
#ifdef CONFIG_SPI_1_NRF_SPI
|
2022-06-21 04:27:32 +08:00
|
|
|
SPI_NRFX_SPI_DEFINE(1);
|
2018-03-02 22:05:00 +08:00
|
|
|
#endif
|
|
|
|
|
|
|
|
#ifdef CONFIG_SPI_2_NRF_SPI
|
2022-06-21 04:27:32 +08:00
|
|
|
SPI_NRFX_SPI_DEFINE(2);
|
2018-03-02 22:05:00 +08:00
|
|
|
#endif
|