2021-11-30 05:51:48 +08:00
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/*
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* Copyright (c) 2021 Yonatan Schachter
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*
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* SPDX-License-Identifier: Apache-2.0
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*/
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#ifndef RPI_PICO_DEFAULT_IRQ_PRIORITY
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#define RPI_PICO_DEFAULT_IRQ_PRIORITY 3
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#endif
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2022-03-22 08:25:39 +08:00
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#define RPI_PICO_RESETS_RESET_ADC 0
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#define RPI_PICO_RESETS_RESET_BUSCTRL 1
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#define RPI_PICO_RESETS_RESET_DMA 2
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#define RPI_PICO_RESETS_RESET_I2C0 3
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#define RPI_PICO_RESETS_RESET_I2C1 4
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#define RPI_PICO_RESETS_RESET_IO_BANK0 5
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#define RPI_PICO_RESETS_RESET_IO_QSPI 6
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#define RPI_PICO_RESETS_RESET_JTAG 7
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#define RPI_PICO_RESETS_RESET_PADS_BANK0 8
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#define RPI_PICO_RESETS_RESET_PADS_QSPI 9
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#define RPI_PICO_RESETS_RESET_PIO0 10
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#define RPI_PICO_RESETS_RESET_PIO1 11
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#define RPI_PICO_RESETS_RESET_PLL_SYS 12
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#define RPI_PICO_RESETS_RESET_PLL_USB 13
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#define RPI_PICO_RESETS_RESET_PWM 14
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#define RPI_PICO_RESETS_RESET_RTC 15
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#define RPI_PICO_RESETS_RESET_SPI0 16
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#define RPI_PICO_RESETS_RESET_SPI1 17
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#define RPI_PICO_RESETS_RESET_SYSCFG 18
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#define RPI_PICO_RESETS_RESET_SYSINFO 19
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#define RPI_PICO_RESETS_RESET_TBMAN 20
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#define RPI_PICO_RESETS_RESET_TIMER 21
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#define RPI_PICO_RESETS_RESET_UART0 22
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#define RPI_PICO_RESETS_RESET_UART1 23
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#define RPI_PICO_RESETS_RESET_USBCTRL 24
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